[llvm] [VectorUtils][VPlan] Consolidate VPWidenIntrinsicRecipe::onlyFirstLaneUsed and isVectorIntrinsicWithScalarOpAtArg (PR #137497)

[Florian Hahn via llvm-commits]

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@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
+; RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -S | FileCheck %s
+
+; Check that we don't unnecessarily broadcast %pow
+define void @powi(ptr noalias %p, i32 %pow) {
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fhahn wrote:

```suggestion
define void @powi_only_first_lane_used_of_second_arg(ptr noalias %p, i32 %pow) {
```

`no alias` could also be stripped, as only `p` is accessed.

https://github.com/llvm/llvm-project/pull/137497