[llvm] [CodeGen] Port MachineUniformityAnalysis to new pass manager (PR #137578)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 29 17:59:27 PDT 2025
https://github.com/paperchalice updated https://github.com/llvm/llvm-project/pull/137578
>From 7629fbb05e10529709b8742da40858429e410d1a Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Mon, 28 Apr 2025 11:56:22 +0800
Subject: [PATCH 1/7] [CodeGen] Port MachineUniformityAnalysis to new pass
manager
---
.../llvm/CodeGen/MachineUniformityAnalysis.h | 22 ++++++++++++++++
.../llvm/Passes/MachinePassRegistry.def | 5 ++--
.../lib/CodeGen/MachineUniformityAnalysis.cpp | 25 +++++++++++++++++++
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../AMDGPU/MIR/always-uniform-gmir.mir | 1 +
.../AMDGPU/MIR/always-uniform.mir | 1 +
.../AMDGPU/MIR/atomics-gmir.mir | 1 +
.../UniformityAnalysis/AMDGPU/MIR/atomics.mir | 1 +
.../AMDGPU/MIR/control-flow-intrinsics.mir | 1 +
.../AMDGPU/MIR/hidden-diverge-gmir.mir | 1 +
.../AMDGPU/MIR/hidden-loop-diverge.mir | 1 +
.../MIR/irreducible/branch-outside-gmir.mir | 1 +
.../irreducible/diverged-entry-basic-gmir.mir | 1 +
.../MIR/irreducible/exit-divergence-gmir.mir | 1 +
.../MIR/irreducible/irreducible-2-gmir.mir | 1 +
.../AMDGPU/MIR/join-loopexit-gmir.mir | 1 +
.../AMDGPU/MIR/loads-gmir.mir | 1 +
.../AMDGPU/MIR/never-uniform.mir | 1 +
.../AMDGPU/MIR/temporal-divergence.mir | 1 +
.../AMDGPU/MIR/uses-value-from-cycle.mir | 1 +
.../AMDGPU/deprecated/hidden-diverge.mir | 1 +
.../AMDGPU/deprecated/irreducible-1.mir | 1 +
22 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h b/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
index a9b5eaf41c3f8..e8c0dc9b43823 100644
--- a/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
+++ b/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
@@ -17,6 +17,7 @@
#include "llvm/ADT/GenericUniformityInfo.h"
#include "llvm/CodeGen/MachineCycleAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineSSAContext.h"
namespace llvm {
@@ -51,6 +52,27 @@ class MachineUniformityAnalysisPass : public MachineFunctionPass {
// TODO: verify analysis
};
+class MachineUniformityAnalysis
+ : public AnalysisInfoMixin<MachineUniformityAnalysis> {
+ friend AnalysisInfoMixin<MachineUniformityAnalysis>;
+ static AnalysisKey Key;
+
+public:
+ using Result = MachineUniformityInfo;
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+};
+
+class MachineUniformityPrinterPass
+ : public PassInfoMixin<MachineUniformityAnalysis> {
+ raw_ostream &OS;
+
+public:
+ explicit MachineUniformityPrinterPass(raw_ostream &OS) : OS(OS) {}
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
+};
+
} // namespace llvm
#endif // LLVM_CODEGEN_MACHINEUNIFORMITYANALYSIS_H
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 8c22a28eba277..7861024356ee5 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -114,6 +114,7 @@ MACHINE_FUNCTION_ANALYSIS("machine-opt-remark-emitter",
MACHINE_FUNCTION_ANALYSIS("machine-post-dom-tree",
MachinePostDominatorTreeAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics", MachineTraceMetricsAnalysis())
+MACHINE_FUNCTION_ANALYSIS("machine-uniformity", MachineUniformityAnalysis())
MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis(PIC))
MACHINE_FUNCTION_ANALYSIS("regalloc-evict", RegAllocEvictionAdvisorAnalysis())
MACHINE_FUNCTION_ANALYSIS("regalloc-priority", RegAllocPriorityAdvisorAnalysis())
@@ -178,6 +179,8 @@ MACHINE_FUNCTION_PASS("print<machine-dom-tree>",
MACHINE_FUNCTION_PASS("print<machine-loops>", MachineLoopPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
MachinePostDominatorTreePrinterPass(errs()))
+MACHINE_FUNCTION_PASS("print<machine-uniformity>",
+ MachineUniformityPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
@@ -302,11 +305,9 @@ DUMMY_MACHINE_FUNCTION_PASS("lrshrink", LiveRangeShrinkPass)
DUMMY_MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass)
DUMMY_MACHINE_FUNCTION_PASS("static-data-splitter", StaticDataSplitter)
DUMMY_MACHINE_FUNCTION_PASS("machine-function-splitter", MachineFunctionSplitterPass)
-DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
-DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 8c95dc71d4e21..4baad653bcef3 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -8,6 +8,7 @@
#include "llvm/CodeGen/MachineUniformityAnalysis.h"
#include "llvm/ADT/GenericUniformityImpl.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/MachineCycleAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -177,6 +178,30 @@ class MachineUniformityInfoPrinterPass : public MachineFunctionPass {
} // namespace
+AnalysisKey MachineUniformityAnalysis::Key;
+
+MachineUniformityAnalysis::Result
+MachineUniformityAnalysis::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &DomTree = MFAM.getResult<MachineDominatorTreeAnalysis>(MF);
+ auto &CI = MFAM.getResult<MachineCycleAnalysis>(MF);
+ auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
+ .getManager();
+ auto &F = MF.getFunction();
+ auto &TTI = FAM.getResult<TargetIRAnalysis>(F);
+ return computeMachineUniformityInfo(MF, CI, DomTree,
+ TTI.hasBranchDivergence(&F));
+}
+
+PreservedAnalyses
+MachineUniformityPrinterPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
+ OS << "MachineUniformityInfo for function: " << MF.getName() << '\n';
+ MUI.print(OS);
+ return PreservedAnalyses::all();
+}
+
char MachineUniformityAnalysisPass::ID = 0;
MachineUniformityAnalysisPass::MachineUniformityAnalysisPass()
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index e7057d9a6b625..4edd352489d16 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -133,6 +133,7 @@
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/MachineSink.h"
#include "llvm/CodeGen/MachineTraceMetrics.h"
+#include "llvm/CodeGen/MachineUniformityAnalysis.h"
#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/CodeGen/OptimizePHIs.h"
#include "llvm/CodeGen/PHIElimination.h"
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
index c4dd7adcf95af..6556a76cec21a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
@@ -1,5 +1,6 @@
# NOTE: This file is Generic MIR translation of test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll test file
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
name: readfirstlane
body: |
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
index 6e1b5d641a8b7..8e7602d6cd237 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# readlane, readfirstlane is always uniform
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
index f2ba7f8b21932..8340a4fb2feba 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
name: test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
index 1bcdf20ae64ce..d43eefedd9693 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
name: test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
index dec55e5662c8c..a19f7a942dc65 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
name: f1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
index 9694a340b5e90..cfc722bd3b5fe 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
# CHECK-LABEL: BLOCK bb.0
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
index 2d01ab1269d61..f53554092bc9e 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: hidden_loop_diverge
# CHECK-LABEL: BLOCK bb.0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
index 1011f9b411f82..1710fd0362377 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: basic
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
index cb1fbbc28d5e1..179d45379e85a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: divergent_cycle_1
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
# CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
index b637a9d9350b9..b200c4bc91dea 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: basic
# CHECK-NOT: CYCLES ASSSUMED DIVERGENT:
# CHECK: CYCLES WITH DIVERGENT EXIT:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
index dcaaf6e1aa59b..aa4c767350399 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# bb0(div)
# / \
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
index 4a1511b0baec2..1b0e524176154 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: test
# CHECK-LABEL: BLOCK bb.0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
index 4f20f4b433e1b..56718edd7f091 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
name: loads
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
index f7c874be87d36..1a8b8b73556f2 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# loads from flat non uniform
---
name: flatloads
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
index 7bff87c09b3c9..9fb472a94796a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
index c1acbb3a1575d..26bb2c023e091 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
---
name: f1
tracksRegLiveness: true
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
index d1a61100a14cb..e250fe30f6c03 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# This test was generated using SelectionDAG, where the compilation flow does
# not match the assumptions made in MachineUA. For now, this test mostly serves
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
index f784f05e12832..72bb8bbfff552 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
# This test was generated using SelectionDAG, where the compilation flow does
# not match the assumptions made in MachineUA. For now, this test mostly serves
>From e7c32a20d1b328d8c47139ac2628b94c6e8f373c Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Mon, 28 Apr 2025 15:47:24 +0800
Subject: [PATCH 2/7] handle unamed machine function
---
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 4baad653bcef3..666890c3f42bb 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -197,6 +197,9 @@ PreservedAnalyses
MachineUniformityPrinterPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
+ StringRef Name = MF.getName();
+ if (Name.empty())
+ Name = "(unamed machine function)";
OS << "MachineUniformityInfo for function: " << MF.getName() << '\n';
MUI.print(OS);
return PreservedAnalyses::all();
>From aaf94347004991dc721148eea6f3b06dd9ed4443 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Mon, 28 Apr 2025 15:48:52 +0800
Subject: [PATCH 3/7] use `-filetype=null`
---
.../UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir | 2 +-
.../Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir | 2 +-
.../Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir | 2 +-
llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir | 2 +-
.../UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir | 2 +-
.../UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir | 2 +-
.../UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir | 2 +-
.../AMDGPU/MIR/irreducible/branch-outside-gmir.mir | 2 +-
.../AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir | 2 +-
.../AMDGPU/MIR/irreducible/exit-divergence-gmir.mir | 2 +-
.../AMDGPU/MIR/irreducible/irreducible-2-gmir.mir | 2 +-
.../UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir | 2 +-
llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir | 2 +-
.../Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir | 2 +-
.../UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir | 2 +-
.../UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir | 2 +-
.../UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir | 2 +-
.../UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir | 2 +-
18 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
index 6556a76cec21a..6866b98150cbf 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
@@ -1,6 +1,6 @@
# NOTE: This file is Generic MIR translation of test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll test file
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
name: readfirstlane
body: |
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
index 8e7602d6cd237..d8349815d2c1b 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# readlane, readfirstlane is always uniform
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
index 8340a4fb2feba..6729faf233c35 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
name: test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
index d43eefedd9693..4fff7088da087 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
name: test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
index a19f7a942dc65..5c777bd9086a7 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
name: f1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
index cfc722bd3b5fe..49c60c372c5a6 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
# CHECK-LABEL: BLOCK bb.0
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
index f53554092bc9e..706490cd4d174 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: hidden_loop_diverge
# CHECK-LABEL: BLOCK bb.0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
index 1710fd0362377..c0cc8145b3b78 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: basic
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
index 179d45379e85a..16c44d3bf3038 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: divergent_cycle_1
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
# CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
index b200c4bc91dea..cba34d13001ab 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: basic
# CHECK-NOT: CYCLES ASSSUMED DIVERGENT:
# CHECK: CYCLES WITH DIVERGENT EXIT:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
index aa4c767350399..9c6d867c89f8b 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# bb0(div)
# / \
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
index 1b0e524176154..175f76b90719c 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: test
# CHECK-LABEL: BLOCK bb.0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
index 56718edd7f091..a8f853ade9968 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
name: loads
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
index 1a8b8b73556f2..a0ebd326715f5 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# loads from flat non uniform
---
name: flatloads
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
index 9fb472a94796a..195585fcb4c33 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
index 26bb2c023e091..72ce4ce7bd9be 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
name: f1
tracksRegLiveness: true
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
index e250fe30f6c03..614c395d837c4 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# This test was generated using SelectionDAG, where the compilation flow does
# not match the assumptions made in MachineUA. For now, this test mostly serves
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
index 72bb8bbfff552..d82be907bb890 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
@@ -1,5 +1,5 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
# This test was generated using SelectionDAG, where the compilation flow does
# not match the assumptions made in MachineUA. For now, this test mostly serves
>From 7088937c31580dd21de1feb9f2098a1b5aebdade Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Mon, 28 Apr 2025 16:37:01 +0800
Subject: [PATCH 4/7] use `printAsOperand`
---
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 666890c3f42bb..5f6bc4460f770 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -197,10 +197,10 @@ PreservedAnalyses
MachineUniformityPrinterPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
- StringRef Name = MF.getName();
- if (Name.empty())
- Name = "(unamed machine function)";
- OS << "MachineUniformityInfo for function: " << MF.getName() << '\n';
+ std::string Name;
+ raw_string_ostream SS(Name);
+ MF.getFunction().printAsOperand(SS, /*PrintType=*/false);
+ OS << "MachineUniformityInfo for function: " << Name << '\n';
MUI.print(OS);
return PreservedAnalyses::all();
}
>From bfc17479bd3a84dd224072297f5d12f48312942b Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Tue, 29 Apr 2025 09:05:33 +0800
Subject: [PATCH 5/7] use getNameOrAsOperand
---
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 5f6bc4460f770..371e2f38026ec 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -197,10 +197,8 @@ PreservedAnalyses
MachineUniformityPrinterPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
- std::string Name;
- raw_string_ostream SS(Name);
- MF.getFunction().printAsOperand(SS, /*PrintType=*/false);
- OS << "MachineUniformityInfo for function: " << Name << '\n';
+ OS << "MachineUniformityInfo for function: "
+ << MF.getFunction().getNameOrAsOperand() << '\n';
MUI.print(OS);
return PreservedAnalyses::all();
}
>From 01300ee926cd129632039ecab3a656f19190d27c Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Tue, 29 Apr 2025 20:30:02 +0800
Subject: [PATCH 6/7] use printAsOperand
---
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 371e2f38026ec..9525d7b41a89c 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -197,8 +197,9 @@ PreservedAnalyses
MachineUniformityPrinterPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
- OS << "MachineUniformityInfo for function: "
- << MF.getFunction().getNameOrAsOperand() << '\n';
+ OS << "MachineUniformityInfo for function: ";
+ MF.getFunction().printAsOperand(OS, /*PrintType=*/false);
+ OS << '\n';
MUI.print(OS);
return PreservedAnalyses::all();
}
>From e576ac3014580abe0fcd7f3cb923cf56129ceb60 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Wed, 30 Apr 2025 08:59:09 +0800
Subject: [PATCH 7/7] fix test by aligning new and legacy print behavior
---
llvm/lib/CodeGen/MachineUniformityAnalysis.cpp | 5 +++--
.../AMDGPU/MIR/always-uniform-gmir.mir | 12 ++++++------
.../AMDGPU/MIR/always-uniform.mir | 6 +++---
.../UniformityAnalysis/AMDGPU/MIR/atomics.mir | 12 ++++++------
.../AMDGPU/MIR/control-flow-intrinsics.mir | 4 ++--
.../AMDGPU/MIR/hidden-diverge-gmir.mir | 2 +-
.../AMDGPU/MIR/hidden-loop-diverge.mir | 2 +-
.../MIR/irreducible/branch-outside-gmir.mir | 2 +-
.../irreducible/diverged-entry-basic-gmir.mir | 4 ++--
.../MIR/irreducible/exit-divergence-gmir.mir | 2 +-
.../MIR/irreducible/irreducible-2-gmir.mir | 4 ++--
.../AMDGPU/MIR/join-loopexit-gmir.mir | 2 +-
.../AMDGPU/MIR/never-uniform.mir | 18 +++++++++---------
.../AMDGPU/MIR/temporal-divergence.mir | 14 +++++++-------
.../AMDGPU/MIR/uses-value-from-cycle.mir | 2 +-
.../AMDGPU/deprecated/hidden-diverge.mir | 2 +-
.../AMDGPU/deprecated/irreducible-1.mir | 2 +-
17 files changed, 48 insertions(+), 47 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 9525d7b41a89c..e4b82ce83fda6 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -236,8 +236,9 @@ bool MachineUniformityAnalysisPass::runOnMachineFunction(MachineFunction &MF) {
void MachineUniformityAnalysisPass::print(raw_ostream &OS,
const Module *) const {
- OS << "MachineUniformityInfo for function: " << UI.getFunction().getName()
- << "\n";
+ OS << "MachineUniformityInfo for function: ";
+ UI.getFunction().getFunction().printAsOperand(OS, /*PrintType=*/false);
+ OS << '\n';
UI.print(OS);
}
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
index 6866b98150cbf..1073ff6bf1d61 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
@@ -5,7 +5,7 @@
name: readfirstlane
body: |
bb.1:
- ; CHECK-LABEL: MachineUniformityInfo for function: readfirstlane
+ ; CHECK-LABEL: MachineUniformityInfo for function: @readfirstlane
; CHECK: DIVERGENT: %{{[0-9]+}}
; CHECK-SAME:llvm.amdgcn.workitem.id.x
; CHECK-NOT: DIVERGENT: {{.*}}llvm.amdgcn.readfirstlane
@@ -20,7 +20,7 @@ name: icmp
body: |
bb.1:
liveins: $sgpr4_sgpr5
- ; CHECK-LABEL: MachineUniformityInfo for function: icmp
+ ; CHECK-LABEL: MachineUniformityInfo for function: @icmp
; CHECK-NEXT: ALL VALUES UNIFORM
%3:_(p4) = COPY $sgpr4_sgpr5
@@ -40,7 +40,7 @@ name: fcmp
body: |
bb.1:
liveins: $sgpr4_sgpr5
- ; CHECK-LABEL: MachineUniformityInfo for function: fcmp
+ ; CHECK-LABEL: MachineUniformityInfo for function: @fcmp
; CHECK-NEXT: ALL VALUES UNIFORM
%3:_(p4) = COPY $sgpr4_sgpr5
@@ -63,7 +63,7 @@ name: ballot
body: |
bb.1:
liveins: $sgpr4_sgpr5
- ; CHECK-LABEL: MachineUniformityInfo for function: ballot
+ ; CHECK-LABEL: MachineUniformityInfo for function: @ballot
; CHECK-NEXT: ALL VALUES UNIFORM
%2:_(p4) = COPY $sgpr4_sgpr5
@@ -86,7 +86,7 @@ registers:
body: |
bb.0:
liveins: $vgpr0
- ; CHECK-LABEL: MachineUniformityInfo for function: asm_sgpr
+ ; CHECK-LABEL: MachineUniformityInfo for function: @asm_sgpr
; CHECK-NOT: DIVERGENT: %1
%0:_(s32) = COPY $vgpr0
@@ -113,7 +113,7 @@ frameInfo:
body: |
bb.0:
liveins: $vgpr0
- ; CHECK-LABEL: MachineUniformityInfo for function: asm_mixed_sgpr_vgpr
+ ; CHECK-LABEL: MachineUniformityInfo for function: @asm_mixed_sgpr_vgpr
; CHECK: DIVERGENT: %0:
; CHECK: DIVERGENT: %3:
; CHECK-NOT: DIVERGENT: %1:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
index d8349815d2c1b..f5161bbddc795 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
@@ -9,7 +9,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: readlane
+ ; CHECK-LABEL: MachineUniformityInfo for function: @readlane
; CHECK-NEXT: ALL VALUES UNIFORM
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
@@ -27,7 +27,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: readlane2
+ ; CHECK-LABEL: MachineUniformityInfo for function: @readlane2
; CHECK-NEXT: ALL VALUES UNIFORM
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
@@ -48,7 +48,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: sgprcopy
+ ; CHECK-LABEL: MachineUniformityInfo for function: @sgprcopy
; CHECK-NEXT: ALL VALUES UNIFORM
liveins: $sgpr0,$sgpr1,$vgpr0
%0:sgpr_32 = COPY $sgpr0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
index 4fff7088da087..432582197f652 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
@@ -6,7 +6,7 @@ name: test1
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: test1
+ ; CHECK-LABEL: MachineUniformityInfo for function: @test1
%2:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
%0:vgpr_32 = IMPLICIT_DEF
@@ -26,7 +26,7 @@ name: test2
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: test2
+ ; CHECK-LABEL: MachineUniformityInfo for function: @test2
%3:vgpr_32 = IMPLICIT_DEF
%2:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
@@ -49,7 +49,7 @@ name: atomic_inc
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: atomic_inc
+ ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_inc
%2:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
%0:vgpr_32 = IMPLICIT_DEF
@@ -66,7 +66,7 @@ name: atomic_inc_64
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: atomic_inc_64
+ ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_inc_64
%3:vgpr_32 = IMPLICIT_DEF
%2:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
@@ -89,7 +89,7 @@ name: atomic_dec
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: atomic_dec
+ ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_dec
%2:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
%0:vgpr_32 = IMPLICIT_DEF
@@ -107,7 +107,7 @@ name: atomic_dec_64
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: atomic_dec_64
+ ; CHECK-LABEL: MachineUniformityInfo for function: @atomic_dec_64
%3:vgpr_32 = IMPLICIT_DEF
%2:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = IMPLICIT_DEF
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
index 5c777bd9086a7..4da7c4381c7e6 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
@@ -4,7 +4,7 @@
---
name: f1
body: |
- ; CHECK-LABEL: MachineUniformityInfo for function: f1
+ ; CHECK-LABEL: MachineUniformityInfo for function: @f1
bb.0:
successors: %bb.1, %bb.2
@@ -24,7 +24,7 @@ body: |
---
name: f2
body: |
- ; CHECK-LABEL: MachineUniformityInfo for function: f2
+ ; CHECK-LABEL: MachineUniformityInfo for function: @f2
bb.0:
successors: %bb.1, %bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
index 49c60c372c5a6..27c53815feb06 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
@@ -1,6 +1,6 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
+# CHECK-LABEL: MachineUniformityInfo for function: @hidden_diverge
# CHECK-LABEL: BLOCK bb.0
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(slt)
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
index 706490cd4d174..fd811e276c593 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
@@ -1,6 +1,6 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: hidden_loop_diverge
+# CHECK-LABEL: MachineUniformityInfo for function: @hidden_loop_diverge
# CHECK-LABEL: BLOCK bb.0
# CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(slt), %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
index c0cc8145b3b78..029d87b7ede6a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
@@ -1,7 +1,7 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: basic
+# CHECK-LABEL: MachineUniformityInfo for function: @basic
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
# CHECK-NEXT: depth=1: entries(bb.1 bb.3) bb.2
# CHECK-LABEL: BLOCK bb.1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
index 16c44d3bf3038..524ea4e920cd8 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
@@ -1,6 +1,6 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: divergent_cycle_1
+# CHECK-LABEL: MachineUniformityInfo for function: @divergent_cycle_1
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
# CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2
# CHECK-NEXT: CYCLES WITH DIVERGENT EXIT:
@@ -61,7 +61,7 @@ body: |
S_ENDPGM 0
...
-# CHECK-LABEL: MachineUniformityInfo for function: uniform_cycle_1
+# CHECK-LABEL: MachineUniformityInfo for function: @uniform_cycle_1
---
name: uniform_cycle_1
tracksRegLiveness: true
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
index cba34d13001ab..63e0e785ba47a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
@@ -1,6 +1,6 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: basic
+# CHECK-LABEL: MachineUniformityInfo for function: @basic
# CHECK-NOT: CYCLES ASSSUMED DIVERGENT:
# CHECK: CYCLES WITH DIVERGENT EXIT:
# CHECK: depth=1: entries(bb.1 bb.3) bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
index 9c6d867c89f8b..7050f6dd22105 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
@@ -6,7 +6,7 @@
# bb1 <-> bb2
# |
# bb3
-# CHECK-LABEL: MachineUniformityInfo for function: cycle_diverge_enter
+# CHECK-LABEL: MachineUniformityInfo for function: @cycle_diverge_enter
# CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
# CHECK-NEXT: depth=1: entries(bb.2 bb.1)
# CHECK-NEXT: CYCLES WITH DIVERGENT EXIT:
@@ -47,7 +47,7 @@ body: |
...
-# CHECK-LABEL: MachineUniformityInfo for function: cycle_diverge_exit
+# CHECK-LABEL: MachineUniformityInfo for function: @cycle_diverge_exit
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_(s1) = G_UADDO %8:_, %{{[0-9]*}}:_
# bb0
# / \
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
index 175f76b90719c..ffafb9b3ba633 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
@@ -1,6 +1,6 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: test
+# CHECK-LABEL: MachineUniformityInfo for function: @test
# CHECK-LABEL: BLOCK bb.0
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(eq), %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
index a0ebd326715f5..3ef1c46dd1b2d 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
@@ -9,7 +9,7 @@ machineFunctionInfo:
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: flatloads
+ ; CHECK-LABEL: MachineUniformityInfo for function: @flatloads
; CHECK: DIVERGENT: %1
; CHECK-NOT: DIVERGENT: %2
%0:vreg_64 = IMPLICIT_DEF
@@ -28,7 +28,7 @@ machineFunctionInfo:
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: scratchloads
+ ; CHECK-LABEL: MachineUniformityInfo for function: @scratchloads
; CHECK: DIVERGENT: %1
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%1:vgpr_32 = SCRATCH_LOAD_DWORD %0, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32), addrspace 5)
@@ -44,7 +44,7 @@ machineFunctionInfo:
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: globalloads
+ ; CHECK-LABEL: MachineUniformityInfo for function: @globalloads
; CHECK: DIVERGENT: %2
; CHECK-NOT: DIVERGENT: %3
%0:vreg_64 = IMPLICIT_DEF
@@ -64,7 +64,7 @@ machineFunctionInfo:
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: dsreads
+ ; CHECK-LABEL: MachineUniformityInfo for function: @dsreads
; CHECK-NEXT: ALL VALUES UNIFORM
%0:vreg_64 = IMPLICIT_DEF
$m0 = S_MOV_B32 0
@@ -80,7 +80,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: sgprcopy
+ ; CHECK-LABEL: MachineUniformityInfo for function: @sgprcopy
; CHECK: DIVERGENT: %2
liveins: $sgpr0,$sgpr1,$vgpr0
%0:sgpr_32 = COPY $sgpr0
@@ -96,7 +96,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: writelane
+ ; CHECK-LABEL: MachineUniformityInfo for function: @writelane
; CHECK: DIVERGENT: %4
; Note how %5 is the result of a vector compare, but it is reported as
@@ -124,7 +124,7 @@ name: physicalreg
tracksRegLiveness: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: physicalreg
+ ; CHECK-LABEL: MachineUniformityInfo for function: @physicalreg
; CHECK: DIVERGENT: %0
; CHECK: DIVERGENT: %1
; CHECK: DIVERGENT: %2
@@ -148,7 +148,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: mbcnt_lo
+ ; CHECK-LABEL: MachineUniformityInfo for function: @mbcnt_lo
; CHECK: DIVERGENT: %0
%0:vgpr_32 = V_MBCNT_LO_U32_B32_e64 -1, 0, implicit $exec
S_ENDPGM 0
@@ -159,7 +159,7 @@ machineFunctionInfo:
isEntryFunction: true
body: |
bb.0:
- ; CHECK-LABEL: MachineUniformityInfo for function: mbcnt_hi
+ ; CHECK-LABEL: MachineUniformityInfo for function: @mbcnt_hi
; CHECK: DIVERGENT: %0
%0:vgpr_32 = V_MBCNT_HI_U32_B32_e64 -1, 0, implicit $exec
S_ENDPGM 0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
index 195585fcb4c33..a0f637b24e5ab 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
@@ -2,7 +2,7 @@
# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge
+# CHECK-LABEL: MachineUniformityInfo for function: @temporal_diverge
name: temporal_diverge
alignment: 1
legalized: true
@@ -41,7 +41,7 @@ body: |
...
---
-# CHECK-LABEL: MachineUniformityInfo for function: phi_at_exit
+# CHECK-LABEL: MachineUniformityInfo for function: @phi_at_exit
name: phi_at_exit
alignment: 1
legalized: true
@@ -99,7 +99,7 @@ body: |
...
---
-# CHECK-LABEL: MachineUniformityInfo for function: phi_after_exit
+# CHECK-LABEL: MachineUniformityInfo for function: @phi_after_exit
name: phi_after_exit
alignment: 1
legalized: true
@@ -157,7 +157,7 @@ body: |
...
---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge_inloop
+# CHECK-LABEL: MachineUniformityInfo for function: @temporal_diverge_inloop
name: temporal_diverge_inloop
alignment: 1
legalized: true
@@ -211,7 +211,7 @@ body: |
...
---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_uniform_indivloop
+# CHECK-LABEL: MachineUniformityInfo for function: @temporal_uniform_indivloop
name: temporal_uniform_indivloop
alignment: 1
legalized: true
@@ -265,7 +265,7 @@ body: |
...
---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge_loopuser
+# CHECK-LABEL: MachineUniformityInfo for function: @temporal_diverge_loopuser
name: temporal_diverge_loopuser
alignment: 1
legalized: true
@@ -320,7 +320,7 @@ body: |
...
---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge_loopuser_nested
+# CHECK-LABEL: MachineUniformityInfo for function: @temporal_diverge_loopuser_nested
name: temporal_diverge_loopuser_nested
alignment: 1
legalized: true
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
index 72ce4ce7bd9be..c4e801af326b1 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
@@ -4,7 +4,7 @@
name: f1
tracksRegLiveness: true
body: |
- ; CHECK-LABEL: MachineUniformityInfo for function: f1
+ ; CHECK-LABEL: MachineUniformityInfo for function: @f1
bb.1:
%3:_(s32) = G_CONSTANT i32 0
%25:_(s32) = G_IMPLICIT_DEF
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
index 614c395d837c4..7d3eaee02c387 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
@@ -7,7 +7,7 @@
# be deleted when it is clear that it is not actually testing anything useful.
---
-# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
+# CHECK-LABEL: MachineUniformityInfo for function: @hidden_diverge
# CHECK-LABEL: BLOCK bb.0
# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:vgpr_32(s32) = COPY $vgpr0
# CHECK-LABEL: BLOCK bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
index d82be907bb890..97dfbd05cf242 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
@@ -6,7 +6,7 @@
# the purpose of catching in any crash when invoking MachineUA. The test should
# be deleted when it is clear that it is not actually testing anything useful.
-# CHECK-LABEL: MachineUniformityInfo for function: irreducible
+# CHECK-LABEL: MachineUniformityInfo for function: @irreducible
---
name: irreducible
More information about the llvm-commits
mailing list