[llvm] 6a16da7 - [AMDGPU] Avoid referring to specific number of address spaces. NFC. (#137842)

[via llvm-commits]

Author: Jay Foad
Date: 2025-04-29T22:33:53+01:00
New Revision: 6a16da75d1d52de2211993e25a6485281defe097

URL: https://github.com/llvm/llvm-project/commit/6a16da75d1d52de2211993e25a6485281defe097
DIFF: https://github.com/llvm/llvm-project/commit/6a16da75d1d52de2211993e25a6485281defe097.diff

LOG: [AMDGPU] Avoid referring to specific number of address spaces. NFC. (#137842)

This just avoids some hard coded numbers that would have to be updated
every time we add an address space.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPU.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 4ff761ec19b3c..11f4240581b7b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -540,14 +540,11 @@ enum TargetIndex {
 };
 
 static inline bool addrspacesMayAlias(unsigned AS1, unsigned AS2) {
-  static_assert(AMDGPUAS::MAX_AMDGPU_ADDRESS <= 9, "Addr space out of range");
-
   if (AS1 > AMDGPUAS::MAX_AMDGPU_ADDRESS || AS2 > AMDGPUAS::MAX_AMDGPU_ADDRESS)
     return true;
 
-  // This array is indexed by address space value enum elements 0 ... to 9
   // clang-format off
-  static const bool ASAliasRules[10][10] = {
+  static const bool ASAliasRules[][AMDGPUAS::MAX_AMDGPU_ADDRESS + 1] = {
     /*                       Flat   Global Region  Local Constant Private Const32 BufFatPtr BufRsrc BufStrdPtr */
     /* Flat     */            {true,  true,  false, true,  true,  true,  true,  true,  true,  true},
     /* Global   */            {true,  true,  false, false, true,  false, true,  true,  true,  true},
@@ -561,6 +558,7 @@ static inline bool addrspacesMayAlias(unsigned AS1, unsigned AS2) {
     /* Buffer Strided Ptr  */ {true,  true,  false, false, true,  false, true,  true,  true,  true},
   };
   // clang-format on
+  static_assert(std::size(ASAliasRules) == AMDGPUAS::MAX_AMDGPU_ADDRESS + 1);
 
   return ASAliasRules[AS1][AS2];
 }