[llvm] [CodeGen] Remove experimental deferred spilling from GreedyRegAlloc (PR #137850)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 29 11:00:48 PDT 2025
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions h,cpp -- llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h llvm/include/llvm/CodeGen/TargetRegisterInfo.h llvm/lib/CodeGen/RegAllocGreedy.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index c93848022..24ed5fcfb 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -314,14 +314,8 @@ INITIALIZE_PASS_END(RAGreedyLegacy, "greedy", "Greedy Register Allocator",
false, false)
#ifndef NDEBUG
-const char *const RAGreedy::StageName[] = {
- "RS_New",
- "RS_Assign",
- "RS_Split",
- "RS_Split2",
- "RS_Spill",
- "RS_Done"
-};
+const char *const RAGreedy::StageName[] = {"RS_New", "RS_Assign", "RS_Split",
+ "RS_Split2", "RS_Spill", "RS_Done"};
#endif
// Hysteresis to use when comparing floats.
@@ -2634,8 +2628,8 @@ MCRegister RAGreedy::selectOrSplitImpl(const LiveInterval &VirtReg,
}
// Finally spill VirtReg itself.
- NamedRegionTimer T("spill", "Spiller", TimerGroupName,
- TimerGroupDescription, TimePassesIsEnabled);
+ NamedRegionTimer T("spill", "Spiller", TimerGroupName, TimerGroupDescription,
+ TimePassesIsEnabled);
LiveRangeEdit LRE(&VirtReg, NewVRegs, *MF, *LIS, VRM, this, &DeadRemats);
spiller().spill(LRE, &Order);
ExtraInfo->setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done);
``````````
</details>
https://github.com/llvm/llvm-project/pull/137850
More information about the llvm-commits
mailing list