[llvm] [CodeGen] Utilizing register units based liveIns tracking in MBB (PR #129847)

[Vikash Gupta via llvm-commits]

vg0204 wrote:

> Before we can switch the liveins representation to regunits I think we need a proper fix for #96146. Without that, regunits cannot distinguish AArch64 Qn and Dn registers, because there is no regunit corresponding to the not-directly-addressable high bits of those registers.

Yes, it would be must needed. Also for other architecture (besides AMD GPU), regUnit could have 2 roots which could spawn 2 such regUnit physReg. So, I hope that wouldn't be troublesome

https://github.com/llvm/llvm-project/pull/129847