[llvm] MachineScheduler: Improve instruction clustering (PR #137784)

[Pengcheng Wang via llvm-commits]

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@@ -1410,24 +1410,24 @@ define <16 x i8> @buildvec_v16i8_loads_contigous(ptr %p) {
 ; RV32VB-NEXT:    slli t1, t1, 24
 ; RV32VB-NEXT:    or a7, t0, a7
 ; RV32VB-NEXT:    or a4, a4, a5
-; RV32VB-NEXT:    lbu a5, 12(a0)
-; RV32VB-NEXT:    lbu t0, 13(a0)
-; RV32VB-NEXT:    or a6, t1, a6
+; RV32VB-NEXT:    or a5, t1, a6
+; RV32VB-NEXT:    lbu a6, 13(a0)
+; RV32VB-NEXT:    lbu t0, 12(a0)
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wangpc-pp wrote:

Ditto.

https://github.com/llvm/llvm-project/pull/137784