[llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #135149)

Christudasan Devadasan via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 28 23:00:42 PDT 2025


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@@ -2206,6 +2206,47 @@ void AMDGPUCodeGenPassBuilder::addPreEmitPass(AddMachinePass &addPass) const {
 
   addPass(BranchRelaxationPass());
 }
+Error AMDGPUCodeGenPassBuilder::addRegAssignmentOptimized(
+    AddMachinePass &addPass) const {
+  addPass(GCNPreRALongBranchRegPass());
+
+  addRegAllocPassOrOpt(
+      addPass, []() { return RAGreedyPass({onlyAllocateSGPRs, "sgpr"}); });
+
+  // Commit allocated register changes. This is mostly necessary because too
+  // many things rely on the use lists of the physical registers, such as the
+  // verifier. This is only necessary with allocators which use LiveIntervals,
+  // since FastRegAlloc does the replacements itself.
+  // TODO: addPass(VirtRegRewriterPass(false));
----------------
cdevadas wrote:

Enable it.

https://github.com/llvm/llvm-project/pull/135149


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