[llvm] [msan] Implement support for avx512fp16.mask.{add/sub/mul/div/max/min}.sh.round (PR #137441)
Florian Mayer via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 28 15:04:34 PDT 2025
================
@@ -4312,6 +4312,65 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
setOriginForNaryOp(I);
}
+ // For sh.* compiler intrinsics:
+ // llvm.x86.avx512fp16.mask.{add/sub/mul/div/max/min}.sh.round
+ // (<8 x half>, <8 x half>, <8 x half>, i8, i32)
+ // A B WriteThru Mask RoundingMode
+ //
+ // DstShadow[0] = Mask[0] ? (AShadow[0] | BShadow[0]) : WriteThruShadow[0]
+ // DstShadow[1..7] = AShadow[1..7]
+ void visitGenericScalarHalfwordInst(IntrinsicInst &I) {
+ IRBuilder<> IRB(&I);
+
+ assert(I.arg_size() == 5);
+ Value *A = I.getOperand(0);
+ Value *B = I.getOperand(1);
+ Value *WriteThrough = I.getOperand(2);
+ Value *Mask = I.getOperand(3);
+ Value *RoundingMode = I.getOperand(4);
+
+ // Technically, we could probably just check whether the LSB is initialized
+ insertShadowCheck(Mask, &I);
+ insertShadowCheck(RoundingMode, &I);
+
+ assert(isa<FixedVectorType>(A->getType()));
+ unsigned NumElements =
+ cast<FixedVectorType>(A->getType())->getNumElements();
+ assert(NumElements == 8);
+ assert(A->getType() == B->getType());
+ assert(B->getType() == WriteThrough->getType());
+ assert(Mask->getType()->getPrimitiveSizeInBits() == NumElements);
+ assert(RoundingMode->getType()->isIntegerTy());
+
+ Value *AShadow = getShadow(A);
+ Value *AShadowLower = IRB.CreateExtractElement(
+ AShadow, ConstantInt::get(IRB.getInt32Ty(), 0));
+
+ Value *BShadow = getShadow(B);
+ Value *BShadowLower = IRB.CreateExtractElement(
+ BShadow, ConstantInt::get(IRB.getInt32Ty(), 0));
+
+ Value *ABLowerShadow = IRB.CreateOr(AShadowLower, BShadowLower);
----------------
fmayer wrote:
Should this be `ABShadowLower`? Or the other ones `ALowerShadow`?
https://github.com/llvm/llvm-project/pull/137441
More information about the llvm-commits
mailing list