[llvm] [AArch64] Utilize `XAR` for certain vector rotates (PR #137629)

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index b05596923..c3d100371 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -4564,7 +4564,8 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
       if (N0.getOperand(1) != N1.getOperand(1))
         return false;
       SDLoc DL(N1->getOperand(0));
-      SDValue Zero = CurDAG->getRegister(AArch64::XZR, N1->getOperand(0).getValueType());
+      SDValue Zero =
+          CurDAG->getRegister(AArch64::XZR, N1->getOperand(0).getValueType());
       R1 = N1->getOperand(0);
       R2 = Zero;
     }
@@ -4598,14 +4599,14 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
       N1->getOpcode() != AArch64ISD::VLSHR)
     return false;
 
-
   if (N0->getOperand(0) != N1->getOperand(0))
     return false;
 
   SDValue R1, R2;
   if (N1->getOperand(0)->getOpcode() != ISD::XOR) {
     SDLoc DL(N1->getOperand(0));
-    SDValue Zero = CurDAG->getRegister(AArch64::XZR, N1->getOperand(0).getValueType());
+    SDValue Zero =
+        CurDAG->getRegister(AArch64::XZR, N1->getOperand(0).getValueType());
     R1 = N1->getOperand(0);
     R2 = Zero;
   } else {

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https://github.com/llvm/llvm-project/pull/137629