[llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)

[Vikash Gupta via llvm-commits]

vg0204 wrote:

> This feels like about 50x more code than should be required for this. Can you write some MIR tests for the specific pattern you are trying to handle?

Added the basic MIR test which covers the targeted specifc pattern!


https://github.com/llvm/llvm-project/pull/137137