[llvm] [LV] Fix stale entry in MinBWs in tryToWiden (PR #136858)

[Florian Hahn via llvm-commits]

https://github.com/fhahn commented:

Thanks for looking into this.

I think we have reached the point where we cannot easily maintain the assertion; there are a number of VPlan-transforms which may remove instructions that are tracked in the minimal bit width map, but don't have access to it for updating.

With https://github.com/llvm/llvm-project/pull/137005 fixed, I think we should drop the assertion in the transform.

https://github.com/llvm/llvm-project/pull/136858