[llvm] [AMDGPU] Support bottom-up postRA scheduing. (PR #135295)

[Carl Ritson via llvm-commits]

================
@@ -69,6 +69,10 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer {
   // Advance over a MachineInstr bundle. Look for hazards in the bundled
   // instructions.
   void processBundle();
+  // Recede over a MachineInstr bundle. Adds bundled instructions to the
+  // EmittedInstrs queue in bottom-up scheduling mode.
+  // TODO: Hazard detection is not yet implemented.
----------------
perlfu wrote:

I think the point here is that from GFX11+ there are actually no hazards that are detected as part of MI scheduling.
This is a *happy accident* which makes this code correct for GFX11 onward, but ideally it should still be able to detect hazards to inform the scheduler, in case we need that functionality.

I don't think there is an issue with this code not dealing with hazards.
My understanding is that the `PostRAHazardRecognizer` pass ends up handling most hazards.
This always runs top-down using `PreEmitNoops` and `AdvanceCycle`.
It would make sense to add some kind of run-time trap to `processBundleBottomUp` or `RecessCycle` which fails if `IsHazardRecognizerMode` is set?


https://github.com/llvm/llvm-project/pull/135295