[llvm] [AArch64][GlobalISel] Fix EXTRACT_SUBREG reg classes in patterns to generate MULL. (PR #136083)

Amara Emerson via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 20 00:06:17 PDT 2025

Previous message: [llvm] [AArch64][GlobalISel] Fix EXTRACT_SUBREG reg classes in patterns to generate MULL. (PR #136083)
Next message: [llvm] a2029ee - [RISCV] Rename fields in RegRegOp. NFC
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/aemerson approved this pull request.

Nice, thanks.

https://github.com/llvm/llvm-project/pull/136083

Previous message: [llvm] [AArch64][GlobalISel] Fix EXTRACT_SUBREG reg classes in patterns to generate MULL. (PR #136083)
Next message: [llvm] a2029ee - [RISCV] Rename fields in RegRegOp. NFC
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list