[llvm] 609586f - LoongArch: Remove fixup kinds that map to relocation types
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 18 20:16:55 PDT 2025
Author: Fangrui Song
Date: 2025-04-18T20:16:50-07:00
New Revision: 609586f7f61abf170425883fd8ae390b4a69cc0c
URL: https://github.com/llvm/llvm-project/commit/609586f7f61abf170425883fd8ae390b4a69cc0c
DIFF: https://github.com/llvm/llvm-project/commit/609586f7f61abf170425883fd8ae390b4a69cc0c.diff
LOG: LoongArch: Remove fixup kinds that map to relocation types
Follow-up to 40789ce7f1b7cff6de82b7f93db25a8c54194d46
("MCFixup: Move relocation values before FK_NONE")
Added:
Modified:
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index 2d531b244af38..2b65901f1f8a1 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -217,9 +217,7 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
MCSection *Sec = AF.getParent();
MCContext &Ctx = Asm.getContext();
const MCExpr *Dummy = MCConstantExpr::create(0, Ctx);
- // Create fixup_loongarch_align fixup.
- MCFixup Fixup =
- MCFixup::create(0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_align));
+ MCFixup Fixup = MCFixup::create(0, Dummy, ELF::R_LARCH_ALIGN);
unsigned MaxBytesToEmit = AF.getMaxBytesToEmit();
auto createExtendedValue = [&]() {
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
index 099bdabce199f..e7c09a0e97c6e 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
@@ -34,9 +34,8 @@ class LoongArchAsmBackend : public MCAsmBackend {
public:
LoongArchAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit,
const MCTargetOptions &Options)
- : MCAsmBackend(llvm::endianness::little,
- LoongArch::fixup_loongarch_relax),
- STI(STI), OSABI(OSABI), Is64Bit(Is64Bit), TargetOptions(Options) {}
+ : MCAsmBackend(llvm::endianness::little, ELF::R_LARCH_RELAX), STI(STI),
+ OSABI(OSABI), Is64Bit(Is64Bit), TargetOptions(Options) {}
~LoongArchAsmBackend() override {}
bool handleAddSubRelocations(const MCAssembler &Asm, const MCFragment &F,
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
index 0c0caead731b5..bfbf9a4253d0c 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
@@ -110,9 +110,6 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_LARCH_TLS_LE64_LO20;
case LoongArch::fixup_loongarch_tls_le64_hi12:
return ELF::R_LARCH_TLS_LE64_HI12;
- case LoongArch::fixup_loongarch_call36:
- return ELF::R_LARCH_CALL36;
- // TODO: Handle more fixup-kinds.
}
}
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
index 4bd64be7e94f9..e2a2cd79e1d8b 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
@@ -51,102 +51,6 @@ enum Fixups {
// LoongArchAsmBackend::applyFixup.
fixup_loongarch_invalid,
NumTargetFixupKinds = fixup_loongarch_invalid - FirstTargetFixupKind,
-
- // Define fixups for force relocation as FirstRelocationKind+V
- // represents the relocation type with number V.
- // 20-bit fixup corresponding to %pc_hi20(foo) for instruction pcalau12i.
- fixup_loongarch_pcala_hi20 = ELF::R_LARCH_PCALA_HI20,
- // 12-bit fixup corresponding to %pc_lo12(foo) for instructions like addi.w/d.
- fixup_loongarch_pcala_lo12,
- // 20-bit fixup corresponding to %pc64_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_pcala64_lo20,
- // 12-bit fixup corresponding to %pc64_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_pcala64_hi12,
- // 20-bit fixup corresponding to %got_pc_hi20(foo) for instruction pcalau12i.
- fixup_loongarch_got_pc_hi20,
- // 12-bit fixup corresponding to %got_pc_lo12(foo) for instructions
- // ld.w/ld.d/add.d.
- fixup_loongarch_got_pc_lo12,
- // 20-bit fixup corresponding to %got64_pc_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_got64_pc_lo20,
- // 12-bit fixup corresponding to %got64_pc_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_got64_pc_hi12,
- // 20-bit fixup corresponding to %got_hi20(foo) for instruction lu12i.w.
- fixup_loongarch_got_hi20,
- // 12-bit fixup corresponding to %got_lo12(foo) for instruction ori.
- fixup_loongarch_got_lo12,
- // 20-bit fixup corresponding to %got64_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_got64_lo20,
- // 12-bit fixup corresponding to %got64_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_got64_hi12,
- // Skip R_LARCH_TLS_LE_*.
- // 20-bit fixup corresponding to %ie_pc_hi20(foo) for instruction pcalau12i.
- fixup_loongarch_tls_ie_pc_hi20 = ELF::R_LARCH_TLS_IE_PC_HI20,
- // 12-bit fixup corresponding to %ie_pc_lo12(foo) for instructions
- // ld.w/ld.d/add.d.
- fixup_loongarch_tls_ie_pc_lo12,
- // 20-bit fixup corresponding to %ie64_pc_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_tls_ie64_pc_lo20,
- // 12-bit fixup corresponding to %ie64_pc_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_tls_ie64_pc_hi12,
- // 20-bit fixup corresponding to %ie_hi20(foo) for instruction lu12i.w.
- fixup_loongarch_tls_ie_hi20,
- // 12-bit fixup corresponding to %ie_lo12(foo) for instruction ori.
- fixup_loongarch_tls_ie_lo12,
- // 20-bit fixup corresponding to %ie64_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_tls_ie64_lo20,
- // 12-bit fixup corresponding to %ie64_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_tls_ie64_hi12,
- // 20-bit fixup corresponding to %ld_pc_hi20(foo) for instruction pcalau12i.
- fixup_loongarch_tls_ld_pc_hi20,
- // 20-bit fixup corresponding to %ld_hi20(foo) for instruction lu12i.w.
- fixup_loongarch_tls_ld_hi20,
- // 20-bit fixup corresponding to %gd_pc_hi20(foo) for instruction pcalau12i.
- fixup_loongarch_tls_gd_pc_hi20,
- // 20-bit fixup corresponding to %gd_hi20(foo) for instruction lu12i.w.
- fixup_loongarch_tls_gd_hi20,
- // Generate an R_LARCH_RELAX which indicates the linker may relax here.
- fixup_loongarch_relax = ELF::R_LARCH_RELAX,
- // Generate an R_LARCH_ALIGN which indicates the linker may fixup align here.
- fixup_loongarch_align = ELF::R_LARCH_ALIGN,
- // 20-bit fixup corresponding to %pcrel_20(foo) for instruction pcaddi.
- fixup_loongarch_pcrel20_s2,
- // 36-bit fixup corresponding to %call36(foo) for a pair instructions:
- // pcaddu18i+jirl.
- fixup_loongarch_call36 = ELF::R_LARCH_CALL36,
- // 20-bit fixup corresponding to %desc_pc_hi20(foo) for instruction pcalau12i.
- fixup_loongarch_tls_desc_pc_hi20 = ELF::R_LARCH_TLS_DESC_PC_HI20,
- // 12-bit fixup corresponding to %desc_pc_lo12(foo) for instructions like
- // addi.w/d.
- fixup_loongarch_tls_desc_pc_lo12,
- // 20-bit fixup corresponding to %desc64_pc_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_tls_desc64_pc_lo20,
- // 12-bit fixup corresponding to %desc64_pc_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_tls_desc64_pc_hi12,
- // 20-bit fixup corresponding to %desc_hi20(foo) for instruction lu12i.w.
- fixup_loongarch_tls_desc_hi20,
- // 12-bit fixup corresponding to %desc_lo12(foo) for instruction ori.
- fixup_loongarch_tls_desc_lo12,
- // 20-bit fixup corresponding to %desc64_lo20(foo) for instruction lu32i.d.
- fixup_loongarch_tls_desc64_lo20,
- // 12-bit fixup corresponding to %desc64_hi12(foo) for instruction lu52i.d.
- fixup_loongarch_tls_desc64_hi12,
- // 12-bit fixup corresponding to %desc_ld(foo) for instruction ld.w/d.
- fixup_loongarch_tls_desc_ld,
- // 12-bit fixup corresponding to %desc_call(foo) for instruction jirl.
- fixup_loongarch_tls_desc_call,
- // 20-bit fixup corresponding to %le_hi20_r(foo) for instruction lu12i.w.
- fixup_loongarch_tls_le_hi20_r,
- // Fixup corresponding to %le_add_r(foo) for instruction PseudoAddTPRel_W/D.
- fixup_loongarch_tls_le_add_r,
- // 12-bit fixup corresponding to %le_lo12_r(foo) for instruction addi.w/d.
- fixup_loongarch_tls_le_lo12_r,
- // 20-bit fixup corresponding to %ld_pcrel_20(foo) for instruction pcaddi.
- fixup_loongarch_tls_ld_pcrel20_s2,
- // 20-bit fixup corresponding to %gd_pcrel_20(foo) for instruction pcaddi.
- fixup_loongarch_tls_gd_pcrel20_s2,
- // 20-bit fixup corresponding to %desc_pcrel_20(foo) for instruction pcaddi.
- fixup_loongarch_tls_desc_pcrel20_s2,
};
} // end namespace LoongArch
} // end namespace llvm
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
index b0785e34862d0..b72d84e19e9eb 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
@@ -128,7 +128,7 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO,
bool EnableRelax = STI.hasFeature(LoongArch::FeatureRelax);
const MCExpr *Expr = MO.getExpr();
MCExpr::ExprKind Kind = Expr->getKind();
- LoongArch::Fixups FixupKind = LoongArch::fixup_loongarch_invalid;
+ unsigned FixupKind = LoongArch::fixup_loongarch_invalid;
if (Kind == MCExpr::Target) {
const LoongArchMCExpr *LAExpr = cast<LoongArchMCExpr>(Expr);
@@ -163,142 +163,142 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO,
FixupKind = LoongArch::fixup_loongarch_abs64_hi12;
break;
case LoongArchMCExpr::VK_PCALA_HI20:
- FixupKind = LoongArch::fixup_loongarch_pcala_hi20;
+ FixupKind = ELF::R_LARCH_PCALA_HI20;
break;
case LoongArchMCExpr::VK_PCALA_LO12:
- FixupKind = LoongArch::fixup_loongarch_pcala_lo12;
+ FixupKind = ELF::R_LARCH_PCALA_LO12;
break;
case LoongArchMCExpr::VK_PCALA64_LO20:
- FixupKind = LoongArch::fixup_loongarch_pcala64_lo20;
+ FixupKind = ELF::R_LARCH_PCALA64_LO20;
break;
case LoongArchMCExpr::VK_PCALA64_HI12:
- FixupKind = LoongArch::fixup_loongarch_pcala64_hi12;
+ FixupKind = ELF::R_LARCH_PCALA64_HI12;
break;
case LoongArchMCExpr::VK_GOT_PC_HI20:
- FixupKind = LoongArch::fixup_loongarch_got_pc_hi20;
+ FixupKind = ELF::R_LARCH_GOT_PC_HI20;
break;
case LoongArchMCExpr::VK_GOT_PC_LO12:
- FixupKind = LoongArch::fixup_loongarch_got_pc_lo12;
+ FixupKind = ELF::R_LARCH_GOT_PC_LO12;
break;
case LoongArchMCExpr::VK_GOT64_PC_LO20:
- FixupKind = LoongArch::fixup_loongarch_got64_pc_lo20;
+ FixupKind = ELF::R_LARCH_GOT64_PC_LO20;
break;
case LoongArchMCExpr::VK_GOT64_PC_HI12:
- FixupKind = LoongArch::fixup_loongarch_got64_pc_hi12;
+ FixupKind = ELF::R_LARCH_GOT64_PC_HI12;
break;
case LoongArchMCExpr::VK_GOT_HI20:
- FixupKind = LoongArch::fixup_loongarch_got_hi20;
+ FixupKind = ELF::R_LARCH_GOT_HI20;
break;
case LoongArchMCExpr::VK_GOT_LO12:
- FixupKind = LoongArch::fixup_loongarch_got_lo12;
+ FixupKind = ELF::R_LARCH_GOT_LO12;
break;
case LoongArchMCExpr::VK_GOT64_LO20:
- FixupKind = LoongArch::fixup_loongarch_got64_lo20;
+ FixupKind = ELF::R_LARCH_GOT64_LO20;
break;
case LoongArchMCExpr::VK_GOT64_HI12:
- FixupKind = LoongArch::fixup_loongarch_got64_hi12;
+ FixupKind = ELF::R_LARCH_GOT64_HI12;
break;
case LoongArchMCExpr::VK_TLS_LE_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_le_hi20;
+ FixupKind = ELF::R_LARCH_TLS_LE_HI20;
break;
case LoongArchMCExpr::VK_TLS_LE_LO12:
- FixupKind = LoongArch::fixup_loongarch_tls_le_lo12;
+ FixupKind = ELF::R_LARCH_TLS_LE_LO12;
break;
case LoongArchMCExpr::VK_TLS_LE64_LO20:
- FixupKind = LoongArch::fixup_loongarch_tls_le64_lo20;
+ FixupKind = ELF::R_LARCH_TLS_LE64_LO20;
break;
case LoongArchMCExpr::VK_TLS_LE64_HI12:
- FixupKind = LoongArch::fixup_loongarch_tls_le64_hi12;
+ FixupKind = ELF::R_LARCH_TLS_LE64_HI12;
break;
case LoongArchMCExpr::VK_TLS_IE_PC_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_ie_pc_hi20;
+ FixupKind = ELF::R_LARCH_TLS_IE_PC_HI20;
break;
case LoongArchMCExpr::VK_TLS_IE_PC_LO12:
- FixupKind = LoongArch::fixup_loongarch_tls_ie_pc_lo12;
+ FixupKind = ELF::R_LARCH_TLS_IE_PC_LO12;
break;
case LoongArchMCExpr::VK_TLS_IE64_PC_LO20:
- FixupKind = LoongArch::fixup_loongarch_tls_ie64_pc_lo20;
+ FixupKind = ELF::R_LARCH_TLS_IE64_PC_LO20;
break;
case LoongArchMCExpr::VK_TLS_IE64_PC_HI12:
- FixupKind = LoongArch::fixup_loongarch_tls_ie64_pc_hi12;
+ FixupKind = ELF::R_LARCH_TLS_IE64_PC_HI12;
break;
case LoongArchMCExpr::VK_TLS_IE_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_ie_hi20;
+ FixupKind = ELF::R_LARCH_TLS_IE_HI20;
break;
case LoongArchMCExpr::VK_TLS_IE_LO12:
- FixupKind = LoongArch::fixup_loongarch_tls_ie_lo12;
+ FixupKind = ELF::R_LARCH_TLS_IE_LO12;
break;
case LoongArchMCExpr::VK_TLS_IE64_LO20:
- FixupKind = LoongArch::fixup_loongarch_tls_ie64_lo20;
+ FixupKind = ELF::R_LARCH_TLS_IE64_LO20;
break;
case LoongArchMCExpr::VK_TLS_IE64_HI12:
- FixupKind = LoongArch::fixup_loongarch_tls_ie64_hi12;
+ FixupKind = ELF::R_LARCH_TLS_IE64_HI12;
break;
case LoongArchMCExpr::VK_TLS_LD_PC_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_ld_pc_hi20;
+ FixupKind = ELF::R_LARCH_TLS_LD_PC_HI20;
break;
case LoongArchMCExpr::VK_TLS_LD_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_ld_hi20;
+ FixupKind = ELF::R_LARCH_TLS_LD_HI20;
break;
case LoongArchMCExpr::VK_TLS_GD_PC_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_gd_pc_hi20;
+ FixupKind = ELF::R_LARCH_TLS_GD_PC_HI20;
break;
case LoongArchMCExpr::VK_TLS_GD_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_gd_hi20;
+ FixupKind = ELF::R_LARCH_TLS_GD_HI20;
break;
case LoongArchMCExpr::VK_CALL36:
- FixupKind = LoongArch::fixup_loongarch_call36;
+ FixupKind = ELF::R_LARCH_CALL36;
RelaxCandidate = true;
break;
case LoongArchMCExpr::VK_TLS_DESC_PC_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_pc_hi20;
+ FixupKind = ELF::R_LARCH_TLS_DESC_PC_HI20;
break;
case LoongArchMCExpr::VK_TLS_DESC_PC_LO12:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_pc_lo12;
+ FixupKind = ELF::R_LARCH_TLS_DESC_PC_LO12;
break;
case LoongArchMCExpr::VK_TLS_DESC64_PC_LO20:
- FixupKind = LoongArch::fixup_loongarch_tls_desc64_pc_lo20;
+ FixupKind = ELF::R_LARCH_TLS_DESC64_PC_LO20;
break;
case LoongArchMCExpr::VK_TLS_DESC64_PC_HI12:
- FixupKind = LoongArch::fixup_loongarch_tls_desc64_pc_hi12;
+ FixupKind = ELF::R_LARCH_TLS_DESC64_PC_HI12;
break;
case LoongArchMCExpr::VK_TLS_DESC_HI20:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_hi20;
+ FixupKind = ELF::R_LARCH_TLS_DESC_HI20;
break;
case LoongArchMCExpr::VK_TLS_DESC_LO12:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_lo12;
+ FixupKind = ELF::R_LARCH_TLS_DESC_LO12;
break;
case LoongArchMCExpr::VK_TLS_DESC64_LO20:
- FixupKind = LoongArch::fixup_loongarch_tls_desc64_lo20;
+ FixupKind = ELF::R_LARCH_TLS_DESC64_LO20;
break;
case LoongArchMCExpr::VK_TLS_DESC64_HI12:
- FixupKind = LoongArch::fixup_loongarch_tls_desc64_hi12;
+ FixupKind = ELF::R_LARCH_TLS_DESC64_HI12;
break;
case LoongArchMCExpr::VK_TLS_DESC_LD:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_ld;
+ FixupKind = ELF::R_LARCH_TLS_DESC_LD;
break;
case LoongArchMCExpr::VK_TLS_DESC_CALL:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_call;
+ FixupKind = ELF::R_LARCH_TLS_DESC_CALL;
break;
case LoongArchMCExpr::VK_TLS_LE_HI20_R:
- FixupKind = LoongArch::fixup_loongarch_tls_le_hi20_r;
+ FixupKind = ELF::R_LARCH_TLS_LE_HI20_R;
RelaxCandidate = true;
break;
case LoongArchMCExpr::VK_TLS_LE_LO12_R:
- FixupKind = LoongArch::fixup_loongarch_tls_le_lo12_r;
+ FixupKind = ELF::R_LARCH_TLS_LE_LO12_R;
RelaxCandidate = true;
break;
case LoongArchMCExpr::VK_PCREL20_S2:
- FixupKind = LoongArch::fixup_loongarch_pcrel20_s2;
+ FixupKind = ELF::R_LARCH_PCREL20_S2;
break;
case LoongArchMCExpr::VK_TLS_LD_PCREL20_S2:
- FixupKind = LoongArch::fixup_loongarch_tls_ld_pcrel20_s2;
+ FixupKind = ELF::R_LARCH_TLS_LD_PCREL20_S2;
break;
case LoongArchMCExpr::VK_TLS_GD_PCREL20_S2:
- FixupKind = LoongArch::fixup_loongarch_tls_gd_pcrel20_s2;
+ FixupKind = ELF::R_LARCH_TLS_GD_PCREL20_S2;
break;
case LoongArchMCExpr::VK_TLS_DESC_PCREL20_S2:
- FixupKind = LoongArch::fixup_loongarch_tls_desc_pcrel20_s2;
+ FixupKind = ELF::R_LARCH_TLS_DESC_PCREL20_S2;
break;
}
} else if (Kind == MCExpr::SymbolRef &&
@@ -338,8 +338,8 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO,
// hint.
if (EnableRelax && RelaxCandidate) {
const MCConstantExpr *Dummy = MCConstantExpr::create(0, Ctx);
- Fixups.push_back(MCFixup::create(
- 0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_relax), MI.getLoc()));
+ Fixups.push_back(
+ MCFixup::create(0, Dummy, ELF::R_LARCH_RELAX, MI.getLoc()));
}
return 0;
@@ -388,15 +388,14 @@ void LoongArchMCCodeEmitter::expandAddTPRel(const MCInst &MI,
"Expected %le_add_r relocation on TP-relative symbol");
// Emit the correct %le_add_r relocation for the symbol.
- Fixups.push_back(MCFixup::create(
- 0, Expr, MCFixupKind(LoongArch::fixup_loongarch_tls_le_add_r),
- MI.getLoc()));
+ Fixups.push_back(
+ MCFixup::create(0, Expr, ELF::R_LARCH_TLS_LE_ADD_R, MI.getLoc()));
// Emit R_LARCH_RELAX for %le_add_r when the relax feature is enabled.
if (STI.hasFeature(LoongArch::FeatureRelax)) {
const MCConstantExpr *Dummy = MCConstantExpr::create(0, Ctx);
- Fixups.push_back(MCFixup::create(
- 0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_relax), MI.getLoc()));
+ Fixups.push_back(
+ MCFixup::create(0, Dummy, ELF::R_LARCH_RELAX, MI.getLoc()));
}
// Emit a normal ADD instruction with the given operands.
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