[llvm] 7b0409a - MC: Simplify code with isRelocation

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2025-04-18T19:09:16-07:00
New Revision: 7b0409ad0e5a7e06fd36a3565b7c24f9586344e6

URL: https://github.com/llvm/llvm-project/commit/7b0409ad0e5a7e06fd36a3565b7c24f9586344e6
DIFF: https://github.com/llvm/llvm-project/commit/7b0409ad0e5a7e06fd36a3565b7c24f9586344e6.diff

LOG: MC: Simplify code with isRelocation

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
    llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 8a042e789295f..1517fb22a19f5 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -421,6 +421,10 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                                    MutableArrayRef<char> Data, uint64_t Value,
                                    bool IsResolved,
                                    const MCSubtargetInfo *STI) const {
+  MCFixupKind Kind = Fixup.getKind();
+  if (mc::isRelocation(Kind))
+    return;
+
   if (Fixup.getTargetKind() == FK_Data_8 && TheTriple.isOSBinFormatELF()) {
     auto RefKind = static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
     AArch64MCExpr::Specifier SymLoc = AArch64MCExpr::getSymbolLoc(RefKind);
@@ -441,9 +445,6 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
 
   if (!Value)
     return; // Doesn't change encoding.
-  unsigned Kind = Fixup.getKind();
-  if (Kind >= FirstRelocationKind)
-    return;
   unsigned NumBytes = getFixupKindNumBytes(Kind);
   MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
   MCContext &Ctx = Asm.getContext();

diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
index 4457cff30101e..8e0567ba7307d 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -129,7 +129,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
 
   // Extract the relocation type from the fixup kind, after applying STT_TLS as
   // needed.
-  if (Kind >= FirstRelocationKind)
+  if (mc::isRelocation(Fixup.getKind()))
     return Kind - FirstRelocationKind;
 
   if (IsPCRel) {

diff  --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
index d129e0e2497e4..923e35d1cdf1b 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
@@ -72,7 +72,7 @@ unsigned LoongArchELFObjectWriter::getRelocType(MCContext &Ctx,
   }
 
   unsigned Kind = Fixup.getTargetKind();
-  if (Kind >= FirstRelocationKind)
+  if (mc::isRelocation(Fixup.getKind()))
     return Kind - FirstRelocationKind;
   switch (Kind) {
   default:

diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 5ee39c3afa76f..acdad71757573 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -676,7 +676,7 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                                  bool IsResolved,
                                  const MCSubtargetInfo *STI) const {
   MCFixupKind Kind = Fixup.getKind();
-  if (Kind >= FirstRelocationKind)
+  if (mc::isRelocation(Kind))
     return;
   MCContext &Ctx = Asm.getContext();
   MCFixupKindInfo Info = getFixupKindInfo(Kind);

diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
index 7c953f55a409a..af318b4d3ea28 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
@@ -68,7 +68,7 @@ const MCFixup *RISCVMCExpr::getPCRelHiFixup(const MCFragment **DFOut) const {
     if (F.getOffset() != Offset)
       continue;
     auto Kind = F.getTargetKind();
-    if (Kind < FirstRelocationKind) {
+    if (!mc::isRelocation(F.getKind())) {
       if (Kind == RISCV::fixup_riscv_pcrel_hi20) {
         *DFOut = DF;
         return &F;