[llvm] [IA][RISCV] Add support for vp.load/vp.store with shufflevector (PR #135445)

[Min-Yih Hsu via llvm-commits]

mshockwave wrote:

I made some big changes on this patch:
  - InterleavedAccessPass now propagates the mask of individual lane/field to the TLI callbacks. This fixes the correctness issue I mentioned in one of the earlier comments.
  - Due to the mask propagation, I decided to use what is previously known as `TLI::lowerDeinterleavedIntrinsicToVPLoad` (and its VPStore counterpart) rather than `TLI::lowerInterleavedLoad`. I further renamed `TLI::lowerDeinterleavedIntrinsicToVPLoad` and `TLI::lowerInterleavedIntrinsicToVPStore` to `TLI::lowerDeinterleavedVPLoad` and `TLI::lowerInterleavedVPStore`, respectively.
  - For RISC-V, I created new intrinsics `riscv_segN_load_mask` and `riscv_segN_store_mask`, which are basically `riscv_segN_load` but with an additional mask operand. All these `riscv_segN` intrinsics only take fixed vectors. Note that `riscv_segN_load_mask` don't have a passthru operand because it's difficult to express it (riscv.tuple type doesn't support fixed vector at this moment). Plus, vp.load/store doesn't have passthru operand anyway.  

https://github.com/llvm/llvm-project/pull/135445