[llvm] [RISCV][NFC] Add Zicsr to profiles explicitly (PR #136134)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 17 05:47:35 PDT 2025


https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/136134

To avoid some misunstandings though Zicsr is implied by F/D.


>From a290a77103d39a43a1b26b9fc233e78c7d87de63 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: Thu, 17 Apr 2025 20:45:01 +0800
Subject: [PATCH] [RISCV][NFC] Add Zicsr to profiles explicitly

To avoid some misunstandings though Zicsr is implied by F/D.
---
 llvm/lib/Target/RISCV/RISCVProfiles.td | 1 +
 1 file changed, 1 insertion(+)

diff --git a/llvm/lib/Target/RISCV/RISCVProfiles.td b/llvm/lib/Target/RISCV/RISCVProfiles.td
index bcb776e682aea..92389fecd0b1d 100644
--- a/llvm/lib/Target/RISCV/RISCVProfiles.td
+++ b/llvm/lib/Target/RISCV/RISCVProfiles.td
@@ -24,6 +24,7 @@ defvar RVA20U64BaseFeatures = [Feature64Bit,
                                FeatureStdExtF,
                                FeatureStdExtD,
                                FeatureStdExtC,
+                               FeatureStdExtZicsr,
                                FeatureStdExtZicntr,
                                FeatureStdExtZiccif,
                                FeatureStdExtZiccrse,



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