[llvm] [BOLT][Instrumentation] Initial instrumentation support for RISCV64 (PR #133882)

via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 16 23:02:48 PDT 2025


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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You can test this locally with the following command:
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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp,h,c -- bolt/runtime/sys_riscv64.h bolt/test/runtime/RISCV/instrumentation-ind-call.c bolt/lib/Core/Relocation.cpp bolt/lib/Rewrite/RewriteInstance.cpp bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp bolt/runtime/common.h bolt/runtime/instr.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp b/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
index 0e27d2901..c8a747bee 100644
--- a/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
+++ b/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
@@ -811,7 +811,7 @@ public:
                            .addReg(RISCV::X5)
                            .addImm((Imm >> 12) & 0xFFFFF));
     Insts.emplace_back(
-        MCInstBuilder(RISCV::LUI).addReg(RISCV::X6).addImm((Imm)&0xFFF));
+        MCInstBuilder(RISCV::LUI).addReg(RISCV::X6).addImm((Imm) & 0xFFF));
     Insts.emplace_back(MCInstBuilder(RISCV::SRLI)
                            .addReg(RISCV::X6)
                            .addReg(RISCV::X6)
diff --git a/bolt/test/runtime/RISCV/instrumentation-ind-call.c b/bolt/test/runtime/RISCV/instrumentation-ind-call.c
index 1fd49a774..318858dec 100644
--- a/bolt/test/runtime/RISCV/instrumentation-ind-call.c
+++ b/bolt/test/runtime/RISCV/instrumentation-ind-call.c
@@ -1,7 +1,7 @@
 /*
 REQUIRES: system-linux,bolt-runtime
 
-RUN: %clang %cflags %s -o %t.exe -Wl,-q 
+RUN: %clang %cflags %s -o %t.exe -Wl,-q
 
 RUN: llvm-bolt %t.exe --instrument --instrumentation-file=%t.fdata \
 RUN:   -o %t.instrumented

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https://github.com/llvm/llvm-project/pull/133882


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