[clang] [llvm] [mlir] [NVPTX] Add support for Shared Cluster Memory address space. (PR #135444)

[via llvm-commits]

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@@ -982,8 +982,9 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
     case ADDRESS_SPACE_SHARED:
       Opc = TM.is64Bit() ? NVPTX::cvta_shared_64 : NVPTX::cvta_shared;
       break;
-    case ADDRESS_SPACE_DSHARED:
-      Opc = TM.is64Bit() ? NVPTX::cvta_dshared_64 : NVPTX::cvta_dshared;
+    case ADDRESS_SPACE_SHARED_CLUSTER:
+      Opc = TM.is64Bit() ? NVPTX::cvta_shared_cluster_64
+                         : NVPTX::cvta_shared_cluster;
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modiking wrote:

> I think the missing bit of the puzzle here is that we still support 32-bit compilation on sm_90+

Yeah that's true, having that be enforced early would resolve this problem. I like that as an overall solution to match that in reality there is only 64-bit mode available on sm_90+. Also agreed that can be addressed separately.

https://github.com/llvm/llvm-project/pull/135444