[llvm] [CodeGen][RISCV] Add helper class for emitting CFI instructions into MIR (PR #135845)

[Sergei Barannikov via llvm-commits]

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@@ -548,12 +480,7 @@ void RISCVFrameLowering::allocateAndProbeStackForRVV(
 
   if (EmitCFI) {
     // Set the CFA register back to SP.
-    unsigned Reg = STI.getRegisterInfo()->getDwarfRegNum(SPReg, true);
-    unsigned CFIIndex =
-        MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
-    BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
-        .addCFIIndex(CFIIndex)
-        .setMIFlags(MachineInstr::FrameSetup);
+    CFIBuilder.buildDefCFARegister(SPReg);
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s-barannikov wrote:

Fixed (and I reiterated over the changes once again)


https://github.com/llvm/llvm-project/pull/135845