[llvm] [AMDGPU] Fix register class constraints for si-fold-operands pass when folding immediate into copies (PR #131387)

[via llvm-commits]

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@@ -1,14 +1,23 @@
-# RUN: llc -mtriple=amdgcn -run-pass si-fold-operands -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
-
-# GCN-LABEL:       name: fold-imm-copy
-# GCN:             V_AND_B32_e32 65535
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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mssefat wrote:

Done and I have pushed the updated changes. Could you please review?

https://github.com/llvm/llvm-project/pull/131387