[llvm] [SLP]Initial support for (masked)loads + compress and (masked)interleaved (PR #132099)

[Alexey Bataev via llvm-commits]

alexey-bataev wrote:

> I managed to find a reproducer that's not as problematic as the one I mentioned in the previous comment.
> 
> https://gcc.godbolt.org/z/cT75Pb4Ea
> 
> ```
> $ cat reduced.ll
> target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
> target triple = "aarch64-unknown-linux-gnu"
> 
> define i1 @f(ptr align 8 dereferenceable(104) %0) {
>   %2 = getelementptr i8, ptr %0, i64 56
>   %3 = load float, ptr %2, align 8
>   %4 = fcmp une float %3, 0.000000e+00
>   %5 = zext i1 %4 to i8
>   %6 = getelementptr i8, ptr %0, i64 60
>   %7 = load float, ptr %6, align 4
>   %8 = fcmp une float %7, 0.000000e+00
>   %9 = zext i1 %8 to i8
>   %10 = add i8 %5, %9
>   %11 = getelementptr i8, ptr %0, i64 72
>   %12 = load float, ptr %11, align 8
>   %13 = fcmp une float %12, 0.000000e+00
>   %14 = zext i1 %13 to i8
>   %15 = add i8 %10, %14
>   %16 = getelementptr i8, ptr %0, i64 76
>   %17 = load float, ptr %16, align 4
>   %18 = fcmp une float %17, 0.000000e+00
>   %19 = zext i1 %18 to i8
>   %20 = add i8 %15, %19
>   store i8 %20, ptr %0, align 1
>   %21 = load ptr, ptr %0, align 8
>   %22 = call i1 %21(ptr null, ptr %2, i64 0)
>   ret i1 false
> }
> $ ./clang-bad --target=aarch64-grtev4-linux-gnu  -mcpu=neoverse-n1 -mtune=generic -O3 -o /dev/null -c reduced.ll
> assert.h assertion failed at llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7183 in SDValue llvm::SelectionDAG::getNode(unsigned int, const SDLoc &, EVT, SDValue, SDValue, const SDNodeFlags): VT == MVT::Other && N1.getValueType() == MVT::Other && N2.getValueType() == MVT::Other && "Invalid token factor!"
> ```
> 
> The assertion failure happens elsewhere, but the issue is triggered by this commit.

https://github.com/llvm/llvm-project/issues/135821
A bug in the AARCH664 codegen

https://github.com/llvm/llvm-project/pull/132099