[llvm] 57025b4 - [SLP]Mark smin reduction as signed compare

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2025-04-15T07:24:17-07:00
New Revision: 57025b42c43b2f14f7e58692bc19cd53d1b8a45e

URL: https://github.com/llvm/llvm-project/commit/57025b42c43b2f14f7e58692bc19cd53d1b8a45e
DIFF: https://github.com/llvm/llvm-project/commit/57025b42c43b2f14f7e58692bc19cd53d1b8a45e.diff

LOG: [SLP]Mark smin reduction as signed compare

Reduction signed min must be marked as signed compare, fixing the
analysis for the cases, where the incoming arguments are unsigned.

Fixes #133943

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 50c403906daa9..f7c37d86f601e 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -20170,6 +20170,10 @@ void BoUpSLP::computeMinimumValueSizes() {
     IsTruncRoot = true;
   }
   bool IsSignedCmp = false;
+  if (UserIgnoreList && all_of(*UserIgnoreList, [](Value *V) {
+        return match(V, m_SMin(m_Value(), m_Value()));
+      }))
+    IsSignedCmp = true;
   while (NodeIdx < VectorizableTree.size()) {
     ArrayRef<Value *> TreeRoot = VectorizableTree[NodeIdx]->Scalars;
     unsigned Limit = 2;

diff  --git a/llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
index 67f5ccc3207c1..cf7127e3baf48 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
@@ -7,8 +7,9 @@ define i32 @test(i8 %0) {
 ; CHECK-NEXT:  [[ENTRY:.*:]]
 ; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i8> <i8 poison, i8 0, i8 0, i8 0>, i8 [[TMP0]], i32 0
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp ne <4 x i8> [[TMP1]], zeroinitializer
-; CHECK-NEXT:    [[TMP3:%.*]] = call i1 @llvm.vector.reduce.smin.v4i1(<4 x i1> [[TMP2]])
-; CHECK-NEXT:    [[TMP4:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT:    [[TMP3:%.*]] = zext <4 x i1> [[TMP2]] to <4 x i8>
+; CHECK-NEXT:    [[TMP5:%.*]] = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> [[TMP3]])
+; CHECK-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP5]] to i32
 ; CHECK-NEXT:    ret i32 [[TMP4]]
 ;
 entry: