[llvm] [LLVM][CodeGen][AArch64] Don't scalarise v8{f16,bf16} vsetcc operations. (PR #135398)

[Paul Walker via llvm-commits]

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@@ -841,18 +841,21 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     setOperationPromotedToType(ISD::FRINT,      V4Narrow, MVT::v4f32);
     setOperationPromotedToType(ISD::FNEARBYINT, V4Narrow, MVT::v4f32);
     setOperationPromotedToType(ISD::FCANONICALIZE, V4Narrow, MVT::v4f32);
+    setOperationPromotedToType(ISD::SETCC,         V4Narrow, MVT::v4f32);
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paulwalker-arm wrote:

`getTypeToPromoteTo` does not work in the natural way when operating on vector types.  Specially, there is no guarantee the input and output element counts will match and indeed on AArch64 `getTypeToPromoteTo(v4f16)` returns `v2f32`.

https://github.com/llvm/llvm-project/pull/135398