[llvm] AArch64: Set FMAXIMUMNUM and FMINIMUMNUM as Promote if not fullfp16 (PR #135708)
YunQiang Su via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 15 02:18:47 PDT 2025
https://github.com/wzssyqa updated https://github.com/llvm/llvm-project/pull/135708
>From 687926f501413cbfce01010916e0b63ed60c5f6e Mon Sep 17 00:00:00 2001
From: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: Tue, 15 Apr 2025 08:29:41 +0800
Subject: [PATCH 1/2] AArch64: Set FMAXIMUMNUM and FMINIMUMNUM as Promote if
not fullfp16
Since Promote will emit FP_EXTEND, the result of it will never be
sNaN, so we don't need worry about duplicated of FCANONICALIZE in
expandFMINIMUMNUM_FMAXIMUMNUM.
---
.../Target/AArch64/AArch64ISelLowering.cpp | 2 ++
.../CodeGen/AArch64/fminmax-f16-promote.ll | 28 +++++++++++++++++++
2 files changed, 30 insertions(+)
create mode 100644 llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 830ec6886e6bc..bea8087750d6e 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -795,6 +795,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
ISD::FMAXNUM,
ISD::FMINIMUM,
ISD::FMAXIMUM,
+ ISD::FMINIMUMNUM,
+ ISD::FMAXIMUMNUM,
ISD::FCANONICALIZE,
ISD::STRICT_FADD,
ISD::STRICT_FSUB,
diff --git a/llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll b/llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll
new file mode 100644
index 0000000000000..abd0a8e6591ec
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s
+
+define half @min(half noundef %a, half noundef %b) {
+; CHECK-LABEL: min:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fcvt s1, h1
+; CHECK-NEXT: fcvt s0, h0
+; CHECK-NEXT: fminnm s0, s0, s1
+; CHECK-NEXT: fcvt h0, s0
+; CHECK-NEXT: ret
+entry:
+ %0 = tail call half @llvm.minimumnum.f16(half %a, half %b)
+ ret half %0
+}
+
+define half @max(half noundef %a, half noundef %b) {
+; CHECK-LABEL: max:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fcvt s1, h1
+; CHECK-NEXT: fcvt s0, h0
+; CHECK-NEXT: fmaxnm s0, s0, s1
+; CHECK-NEXT: fcvt h0, s0
+; CHECK-NEXT: ret
+entry:
+ %0 = tail call half @llvm.maximumnum.f16(half %a, half %b)
+ ret half %0
+}
>From 76027e349302260217076f64d49e0a298b19a39f Mon Sep 17 00:00:00 2001
From: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: Tue, 15 Apr 2025 17:17:54 +0800
Subject: [PATCH 2/2] update testcase
---
.../CodeGen/AArch64/fminmax-f16-promote.ll | 28 -
.../AArch64/fp-maximumnum-minimumnum.ll | 1751 ++++++++++++++---
2 files changed, 1478 insertions(+), 301 deletions(-)
delete mode 100644 llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll
diff --git a/llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll b/llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll
deleted file mode 100644
index abd0a8e6591ec..0000000000000
--- a/llvm/test/CodeGen/AArch64/fminmax-f16-promote.ll
+++ /dev/null
@@ -1,28 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s
-
-define half @min(half noundef %a, half noundef %b) {
-; CHECK-LABEL: min:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: fcvt s1, h1
-; CHECK-NEXT: fcvt s0, h0
-; CHECK-NEXT: fminnm s0, s0, s1
-; CHECK-NEXT: fcvt h0, s0
-; CHECK-NEXT: ret
-entry:
- %0 = tail call half @llvm.minimumnum.f16(half %a, half %b)
- ret half %0
-}
-
-define half @max(half noundef %a, half noundef %b) {
-; CHECK-LABEL: max:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: fcvt s1, h1
-; CHECK-NEXT: fcvt s0, h0
-; CHECK-NEXT: fmaxnm s0, s0, s1
-; CHECK-NEXT: fcvt h0, s0
-; CHECK-NEXT: ret
-entry:
- %0 = tail call half @llvm.maximumnum.f16(half %a, half %b)
- ret half %0
-}
diff --git a/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll b/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
index bb3f9a3e52a16..c6b8e41f9bdfd 100644
--- a/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
+++ b/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc --mtriple=aarch64 --mattr=+fullfp16 < %s | FileCheck %s --check-prefix=AARCH64
+; RUN: llc --mtriple=aarch64 --mattr=+fullfp16 < %s | FileCheck %s --check-prefixes=AARCH64,FULLFP16
+; RUN: llc --mtriple=aarch64 < %s | FileCheck %s --check-prefixes=AARCH64,NOFULLFP16
;;;;;;;;;;;;;;;; max_f64
define double @max_nnan_f64(double %a, double %b) {
@@ -142,96 +143,397 @@ entry:
;;;;;;;;;;;;;;;;;; max_f16
define half @max_nnan_f16(half %a, half %b) {
-; AARCH64-LABEL: max_nnan_f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm h0, h0, h1
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_nnan_f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fmaxnm h0, h0, h1
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_nnan_f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan half @llvm.maximumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @max_nnan_v2f16(<2 x half> %a, <2 x half> %b) {
-; AARCH64-LABEL: max_nnan_v2f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_nnan_v2f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_nnan_v2f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @max_nnan_v4f16(<4 x half> %a, <4 x half> %b) {
-; AARCH64-LABEL: max_nnan_v4f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_nnan_v4f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_nnan_v4f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @max_nnan_v8f16(<8 x half> %a, <8 x half> %b) {
-; AARCH64-LABEL: max_nnan_v8f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_nnan_v8f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_nnan_v8f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h1
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h6, v1.h[2]
+; NOFULLFP16-NEXT: mov h7, v0.h[2]
+; NOFULLFP16-NEXT: mov h16, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
+; NOFULLFP16-NEXT: mov h5, v0.h[3]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fmaxnm s3, s3, s2
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fcvt h2, s4
+; NOFULLFP16-NEXT: fmaxnm s4, s7, s6
+; NOFULLFP16-NEXT: mov h6, v1.h[4]
+; NOFULLFP16-NEXT: mov h7, v0.h[4]
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fmaxnm s5, s5, s16
+; NOFULLFP16-NEXT: mov h16, v0.h[5]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: fcvt s6, h7
+; NOFULLFP16-NEXT: mov h7, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h5, s5
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
+; NOFULLFP16-NEXT: mov h4, v1.h[6]
+; NOFULLFP16-NEXT: fmaxnm s3, s6, s3
+; NOFULLFP16-NEXT: mov h6, v0.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt s5, h6
+; NOFULLFP16-NEXT: fmaxnm s6, s16, s7
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
+; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt h3, s6
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
+; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
+; NOFULLFP16-NEXT: fcvt h3, s4
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
+; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v2.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <8 x half> @llvm.maximumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @max_nnan_v9f16(<9 x half> %a, <9 x half> %b) {
-; AARCH64-LABEL: max_nnan_v9f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $h0 killed $h0 def $q0
-; AARCH64-NEXT: // kill: def $h1 killed $h1 def $q1
-; AARCH64-NEXT: // kill: def $h2 killed $h2 def $q2
-; AARCH64-NEXT: add x9, sp, #16
-; AARCH64-NEXT: // kill: def $h3 killed $h3 def $q3
-; AARCH64-NEXT: // kill: def $h4 killed $h4 def $q4
-; AARCH64-NEXT: // kill: def $h5 killed $h5 def $q5
-; AARCH64-NEXT: // kill: def $h6 killed $h6 def $q6
-; AARCH64-NEXT: // kill: def $h7 killed $h7 def $q7
-; AARCH64-NEXT: mov v0.h[1], v1.h[0]
-; AARCH64-NEXT: ldr h1, [sp, #8]
-; AARCH64-NEXT: ld1 { v1.h }[1], [x9]
-; AARCH64-NEXT: add x9, sp, #24
-; AARCH64-NEXT: mov v0.h[2], v2.h[0]
-; AARCH64-NEXT: ldr h2, [sp, #72]
-; AARCH64-NEXT: ld1 { v1.h }[2], [x9]
-; AARCH64-NEXT: add x9, sp, #32
-; AARCH64-NEXT: mov v0.h[3], v3.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[3], [x9]
-; AARCH64-NEXT: add x9, sp, #40
-; AARCH64-NEXT: ldr h3, [sp]
-; AARCH64-NEXT: ld1 { v1.h }[4], [x9]
-; AARCH64-NEXT: add x9, sp, #48
-; AARCH64-NEXT: fmaxnm v2.8h, v3.8h, v2.8h
-; AARCH64-NEXT: mov v0.h[4], v4.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[5], [x9]
-; AARCH64-NEXT: add x9, sp, #56
-; AARCH64-NEXT: str h2, [x8, #16]
-; AARCH64-NEXT: mov v0.h[5], v5.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[6], [x9]
-; AARCH64-NEXT: add x9, sp, #64
-; AARCH64-NEXT: mov v0.h[6], v6.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[7], [x9]
-; AARCH64-NEXT: mov v0.h[7], v7.h[0]
-; AARCH64-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: str q0, [x8]
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_nnan_v9f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; FULLFP16-NEXT: add x9, sp, #16
+; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; FULLFP16-NEXT: ldr h1, [sp, #8]
+; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
+; FULLFP16-NEXT: add x9, sp, #24
+; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; FULLFP16-NEXT: ldr h2, [sp, #72]
+; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
+; FULLFP16-NEXT: add x9, sp, #32
+; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
+; FULLFP16-NEXT: add x9, sp, #40
+; FULLFP16-NEXT: ldr h3, [sp]
+; FULLFP16-NEXT: ld1 { v1.h }[4], [x9]
+; FULLFP16-NEXT: add x9, sp, #48
+; FULLFP16-NEXT: fmaxnm v2.8h, v3.8h, v2.8h
+; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[5], [x9]
+; FULLFP16-NEXT: add x9, sp, #56
+; FULLFP16-NEXT: str h2, [x8, #16]
+; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[6], [x9]
+; FULLFP16-NEXT: add x9, sp, #64
+; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[7], [x9]
+; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
+; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: str q0, [x8]
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_nnan_v9f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: ldr h16, [sp, #16]
+; NOFULLFP16-NEXT: ldr h17, [sp, #8]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: ldr h18, [sp, #24]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fmaxnm s1, s1, s16
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s17
+; NOFULLFP16-NEXT: ldr h16, [sp, #32]
+; NOFULLFP16-NEXT: fmaxnm s2, s2, s18
+; NOFULLFP16-NEXT: ldr h17, [sp, #40]
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fmaxnm s3, s3, s16
+; NOFULLFP16-NEXT: fmaxnm s4, s4, s17
+; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; NOFULLFP16-NEXT: ldr h1, [sp, #48]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: ldr h2, [sp, #56]
+; NOFULLFP16-NEXT: fmaxnm s1, s5, s1
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: ldr h5, [sp, #64]
+; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: ldr h6, [sp, #72]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h5
+; NOFULLFP16-NEXT: fcvt s4, h7
+; NOFULLFP16-NEXT: ldr h5, [sp]
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fmaxnm s2, s4, s3
+; NOFULLFP16-NEXT: fmaxnm s3, s5, s6
+; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
+; NOFULLFP16-NEXT: str h2, [x8, #16]
+; NOFULLFP16-NEXT: str q0, [x8]
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <9 x half> @llvm.maximumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @max_nnan_v16f16(<16 x half> %a, <16 x half> %b) {
-; AARCH64-LABEL: max_nnan_v16f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
-; AARCH64-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_nnan_v16f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
+; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_nnan_v16f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h6, v2.h[1]
+; NOFULLFP16-NEXT: mov h7, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h2
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h16, v3.h[1]
+; NOFULLFP16-NEXT: mov h17, v1.h[1]
+; NOFULLFP16-NEXT: mov h18, v2.h[2]
+; NOFULLFP16-NEXT: mov h19, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s20, h3
+; NOFULLFP16-NEXT: fcvt s21, h1
+; NOFULLFP16-NEXT: mov h22, v3.h[2]
+; NOFULLFP16-NEXT: mov h23, v1.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h24, v0.h[6]
+; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt s5, h16
+; NOFULLFP16-NEXT: fcvt s16, h17
+; NOFULLFP16-NEXT: fcvt s17, h18
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: mov h19, v0.h[3]
+; NOFULLFP16-NEXT: fmaxnm s20, s21, s20
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: mov h22, v3.h[3]
+; NOFULLFP16-NEXT: fmaxnm s6, s7, s6
+; NOFULLFP16-NEXT: mov h7, v2.h[3]
+; NOFULLFP16-NEXT: mov h25, v1.h[6]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: fmaxnm s5, s16, s5
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: mov h23, v1.h[3]
+; NOFULLFP16-NEXT: fmaxnm s17, s18, s17
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt h19, s5
+; NOFULLFP16-NEXT: fcvt h5, s20
+; NOFULLFP16-NEXT: fmaxnm s16, s16, s21
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: mov h21, v2.h[4]
+; NOFULLFP16-NEXT: mov h23, v1.h[4]
+; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h22
+; NOFULLFP16-NEXT: mov h22, v0.h[4]
+; NOFULLFP16-NEXT: fmaxnm s7, s18, s7
+; NOFULLFP16-NEXT: mov h18, v3.h[4]
+; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
+; NOFULLFP16-NEXT: fcvt h16, s16
+; NOFULLFP16-NEXT: fmaxnm s6, s20, s6
+; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
+; NOFULLFP16-NEXT: fcvt s17, h21
+; NOFULLFP16-NEXT: fcvt s19, h22
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: mov h21, v2.h[5]
+; NOFULLFP16-NEXT: mov h22, v0.h[5]
+; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
+; NOFULLFP16-NEXT: mov h16, v3.h[5]
+; NOFULLFP16-NEXT: mov h23, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: fmaxnm s17, s19, s17
+; NOFULLFP16-NEXT: mov h19, v2.h[6]
+; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
+; NOFULLFP16-NEXT: fmaxnm s18, s20, s18
+; NOFULLFP16-NEXT: mov h20, v3.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h21
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: fcvt s22, h24
+; NOFULLFP16-NEXT: mov h2, v2.h[7]
+; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h16
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: fcvt s19, h19
+; NOFULLFP16-NEXT: fcvt s23, h25
+; NOFULLFP16-NEXT: fcvt h18, s18
+; NOFULLFP16-NEXT: fcvt s20, h20
+; NOFULLFP16-NEXT: mov h3, v3.h[7]
+; NOFULLFP16-NEXT: fmaxnm s7, s21, s7
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fmaxnm s6, s16, s6
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
+; NOFULLFP16-NEXT: fmaxnm s16, s22, s19
+; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
+; NOFULLFP16-NEXT: fmaxnm s17, s23, s20
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s2
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt h2, s16
+; NOFULLFP16-NEXT: fmaxnm s1, s1, s3
+; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
+; NOFULLFP16-NEXT: fcvt h6, s17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
+; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
+; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v4.16b
+; NOFULLFP16-NEXT: mov v1.16b, v5.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <16 x half> @llvm.maximumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
@@ -378,96 +680,397 @@ entry:
;;;;;;;;;;;;;;;;;; min_f16
define half @min_nnan_f16(half %a, half %b) {
-; AARCH64-LABEL: min_nnan_f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm h0, h0, h1
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_nnan_f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm h0, h0, h1
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_nnan_f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fminnm s0, s0, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan half @llvm.minimumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @min_nnan_v2f16(<2 x half> %a, <2 x half> %b) {
-; AARCH64-LABEL: min_nnan_v2f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_nnan_v2f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_nnan_v2f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fminnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fminnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fminnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fminnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @min_nnan_v4f16(<4 x half> %a, <4 x half> %b) {
-; AARCH64-LABEL: min_nnan_v4f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_nnan_v4f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_nnan_v4f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fminnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fminnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fminnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fminnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @min_nnan_v8f16(<8 x half> %a, <8 x half> %b) {
-; AARCH64-LABEL: min_nnan_v8f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_nnan_v8f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_nnan_v8f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h1
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h6, v1.h[2]
+; NOFULLFP16-NEXT: mov h7, v0.h[2]
+; NOFULLFP16-NEXT: mov h16, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fminnm s4, s5, s4
+; NOFULLFP16-NEXT: mov h5, v0.h[3]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fminnm s3, s3, s2
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fcvt h2, s4
+; NOFULLFP16-NEXT: fminnm s4, s7, s6
+; NOFULLFP16-NEXT: mov h6, v1.h[4]
+; NOFULLFP16-NEXT: mov h7, v0.h[4]
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fminnm s5, s5, s16
+; NOFULLFP16-NEXT: mov h16, v0.h[5]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: fcvt s6, h7
+; NOFULLFP16-NEXT: mov h7, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h5, s5
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
+; NOFULLFP16-NEXT: mov h4, v1.h[6]
+; NOFULLFP16-NEXT: fminnm s3, s6, s3
+; NOFULLFP16-NEXT: mov h6, v0.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt s5, h6
+; NOFULLFP16-NEXT: fminnm s6, s16, s7
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
+; NOFULLFP16-NEXT: fminnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt h3, s6
+; NOFULLFP16-NEXT: fminnm s0, s0, s1
+; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
+; NOFULLFP16-NEXT: fcvt h3, s4
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
+; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v2.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <8 x half> @llvm.minimumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @min_nnan_v9f16(<9 x half> %a, <9 x half> %b) {
-; AARCH64-LABEL: min_nnan_v9f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $h0 killed $h0 def $q0
-; AARCH64-NEXT: // kill: def $h1 killed $h1 def $q1
-; AARCH64-NEXT: // kill: def $h2 killed $h2 def $q2
-; AARCH64-NEXT: add x9, sp, #16
-; AARCH64-NEXT: // kill: def $h3 killed $h3 def $q3
-; AARCH64-NEXT: // kill: def $h4 killed $h4 def $q4
-; AARCH64-NEXT: // kill: def $h5 killed $h5 def $q5
-; AARCH64-NEXT: // kill: def $h6 killed $h6 def $q6
-; AARCH64-NEXT: // kill: def $h7 killed $h7 def $q7
-; AARCH64-NEXT: mov v0.h[1], v1.h[0]
-; AARCH64-NEXT: ldr h1, [sp, #8]
-; AARCH64-NEXT: ld1 { v1.h }[1], [x9]
-; AARCH64-NEXT: add x9, sp, #24
-; AARCH64-NEXT: mov v0.h[2], v2.h[0]
-; AARCH64-NEXT: ldr h2, [sp, #72]
-; AARCH64-NEXT: ld1 { v1.h }[2], [x9]
-; AARCH64-NEXT: add x9, sp, #32
-; AARCH64-NEXT: mov v0.h[3], v3.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[3], [x9]
-; AARCH64-NEXT: add x9, sp, #40
-; AARCH64-NEXT: ldr h3, [sp]
-; AARCH64-NEXT: ld1 { v1.h }[4], [x9]
-; AARCH64-NEXT: add x9, sp, #48
-; AARCH64-NEXT: fminnm v2.8h, v3.8h, v2.8h
-; AARCH64-NEXT: mov v0.h[4], v4.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[5], [x9]
-; AARCH64-NEXT: add x9, sp, #56
-; AARCH64-NEXT: str h2, [x8, #16]
-; AARCH64-NEXT: mov v0.h[5], v5.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[6], [x9]
-; AARCH64-NEXT: add x9, sp, #64
-; AARCH64-NEXT: mov v0.h[6], v6.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[7], [x9]
-; AARCH64-NEXT: mov v0.h[7], v7.h[0]
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: str q0, [x8]
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_nnan_v9f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; FULLFP16-NEXT: add x9, sp, #16
+; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; FULLFP16-NEXT: ldr h1, [sp, #8]
+; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
+; FULLFP16-NEXT: add x9, sp, #24
+; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; FULLFP16-NEXT: ldr h2, [sp, #72]
+; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
+; FULLFP16-NEXT: add x9, sp, #32
+; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
+; FULLFP16-NEXT: add x9, sp, #40
+; FULLFP16-NEXT: ldr h3, [sp]
+; FULLFP16-NEXT: ld1 { v1.h }[4], [x9]
+; FULLFP16-NEXT: add x9, sp, #48
+; FULLFP16-NEXT: fminnm v2.8h, v3.8h, v2.8h
+; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[5], [x9]
+; FULLFP16-NEXT: add x9, sp, #56
+; FULLFP16-NEXT: str h2, [x8, #16]
+; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[6], [x9]
+; FULLFP16-NEXT: add x9, sp, #64
+; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[7], [x9]
+; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: str q0, [x8]
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_nnan_v9f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: ldr h16, [sp, #16]
+; NOFULLFP16-NEXT: ldr h17, [sp, #8]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: ldr h18, [sp, #24]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fminnm s1, s1, s16
+; NOFULLFP16-NEXT: fminnm s0, s0, s17
+; NOFULLFP16-NEXT: ldr h16, [sp, #32]
+; NOFULLFP16-NEXT: fminnm s2, s2, s18
+; NOFULLFP16-NEXT: ldr h17, [sp, #40]
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fminnm s3, s3, s16
+; NOFULLFP16-NEXT: fminnm s4, s4, s17
+; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; NOFULLFP16-NEXT: ldr h1, [sp, #48]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: ldr h2, [sp, #56]
+; NOFULLFP16-NEXT: fminnm s1, s5, s1
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: ldr h5, [sp, #64]
+; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: ldr h6, [sp, #72]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; NOFULLFP16-NEXT: fminnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h5
+; NOFULLFP16-NEXT: fcvt s4, h7
+; NOFULLFP16-NEXT: ldr h5, [sp]
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fminnm s2, s4, s3
+; NOFULLFP16-NEXT: fminnm s3, s5, s6
+; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
+; NOFULLFP16-NEXT: str h2, [x8, #16]
+; NOFULLFP16-NEXT: str q0, [x8]
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <9 x half> @llvm.minimumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @min_nnan_v16f16(<16 x half> %a, <16 x half> %b) {
-; AARCH64-LABEL: min_nnan_v16f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v3.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v2.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_nnan_v16f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v3.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v2.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_nnan_v16f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h6, v2.h[1]
+; NOFULLFP16-NEXT: mov h7, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h2
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h16, v3.h[1]
+; NOFULLFP16-NEXT: mov h17, v1.h[1]
+; NOFULLFP16-NEXT: mov h18, v2.h[2]
+; NOFULLFP16-NEXT: mov h19, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s20, h3
+; NOFULLFP16-NEXT: fcvt s21, h1
+; NOFULLFP16-NEXT: mov h22, v3.h[2]
+; NOFULLFP16-NEXT: mov h23, v1.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h24, v0.h[6]
+; NOFULLFP16-NEXT: fminnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt s5, h16
+; NOFULLFP16-NEXT: fcvt s16, h17
+; NOFULLFP16-NEXT: fcvt s17, h18
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: mov h19, v0.h[3]
+; NOFULLFP16-NEXT: fminnm s20, s21, s20
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: mov h22, v3.h[3]
+; NOFULLFP16-NEXT: fminnm s6, s7, s6
+; NOFULLFP16-NEXT: mov h7, v2.h[3]
+; NOFULLFP16-NEXT: mov h25, v1.h[6]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: fminnm s5, s16, s5
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: mov h23, v1.h[3]
+; NOFULLFP16-NEXT: fminnm s17, s18, s17
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt h19, s5
+; NOFULLFP16-NEXT: fcvt h5, s20
+; NOFULLFP16-NEXT: fminnm s16, s16, s21
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: mov h21, v2.h[4]
+; NOFULLFP16-NEXT: mov h23, v1.h[4]
+; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h22
+; NOFULLFP16-NEXT: mov h22, v0.h[4]
+; NOFULLFP16-NEXT: fminnm s7, s18, s7
+; NOFULLFP16-NEXT: mov h18, v3.h[4]
+; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
+; NOFULLFP16-NEXT: fcvt h16, s16
+; NOFULLFP16-NEXT: fminnm s6, s20, s6
+; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
+; NOFULLFP16-NEXT: fcvt s17, h21
+; NOFULLFP16-NEXT: fcvt s19, h22
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: mov h21, v2.h[5]
+; NOFULLFP16-NEXT: mov h22, v0.h[5]
+; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
+; NOFULLFP16-NEXT: mov h16, v3.h[5]
+; NOFULLFP16-NEXT: mov h23, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: fminnm s17, s19, s17
+; NOFULLFP16-NEXT: mov h19, v2.h[6]
+; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
+; NOFULLFP16-NEXT: fminnm s18, s20, s18
+; NOFULLFP16-NEXT: mov h20, v3.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h21
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: fcvt s22, h24
+; NOFULLFP16-NEXT: mov h2, v2.h[7]
+; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h16
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: fcvt s19, h19
+; NOFULLFP16-NEXT: fcvt s23, h25
+; NOFULLFP16-NEXT: fcvt h18, s18
+; NOFULLFP16-NEXT: fcvt s20, h20
+; NOFULLFP16-NEXT: mov h3, v3.h[7]
+; NOFULLFP16-NEXT: fminnm s7, s21, s7
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fminnm s6, s16, s6
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
+; NOFULLFP16-NEXT: fminnm s16, s22, s19
+; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
+; NOFULLFP16-NEXT: fminnm s17, s23, s20
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fminnm s0, s0, s2
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt h2, s16
+; NOFULLFP16-NEXT: fminnm s1, s1, s3
+; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
+; NOFULLFP16-NEXT: fcvt h6, s17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
+; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
+; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v4.16b
+; NOFULLFP16-NEXT: mov v1.16b, v5.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call nnan <16 x half> @llvm.minimumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
@@ -642,112 +1245,413 @@ entry:
;;;;;;;;;;;;;;;;;; max_f16
define half @max_f16(half %a, half %b) {
-; AARCH64-LABEL: max_f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm h1, h1, h1
-; AARCH64-NEXT: fminnm h0, h0, h0
-; AARCH64-NEXT: fmaxnm h0, h0, h1
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm h1, h1, h1
+; FULLFP16-NEXT: fminnm h0, h0, h0
+; FULLFP16-NEXT: fmaxnm h0, h0, h1
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: ret
entry:
%c = call half @llvm.maximumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @max_v2f16(<2 x half> %a, <2 x half> %b) {
-; AARCH64-LABEL: max_v2f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; AARCH64-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_v2f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_v2f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @max_v4f16(<4 x half> %a, <4 x half> %b) {
-; AARCH64-LABEL: max_v4f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; AARCH64-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_v4f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_v4f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @max_v8f16(<8 x half> %a, <8 x half> %b) {
-; AARCH64-LABEL: max_v8f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; AARCH64-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_v8f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_v8f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h1
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h6, v1.h[2]
+; NOFULLFP16-NEXT: mov h7, v0.h[2]
+; NOFULLFP16-NEXT: mov h16, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
+; NOFULLFP16-NEXT: mov h5, v0.h[3]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fmaxnm s3, s3, s2
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fcvt h2, s4
+; NOFULLFP16-NEXT: fmaxnm s4, s7, s6
+; NOFULLFP16-NEXT: mov h6, v1.h[4]
+; NOFULLFP16-NEXT: mov h7, v0.h[4]
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fmaxnm s5, s5, s16
+; NOFULLFP16-NEXT: mov h16, v0.h[5]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: fcvt s6, h7
+; NOFULLFP16-NEXT: mov h7, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h5, s5
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
+; NOFULLFP16-NEXT: mov h4, v1.h[6]
+; NOFULLFP16-NEXT: fmaxnm s3, s6, s3
+; NOFULLFP16-NEXT: mov h6, v0.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt s5, h6
+; NOFULLFP16-NEXT: fmaxnm s6, s16, s7
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
+; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt h3, s6
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
+; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
+; NOFULLFP16-NEXT: fcvt h3, s4
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
+; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v2.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @max_v9f16(<9 x half> %a, <9 x half> %b) {
-; AARCH64-LABEL: max_v9f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $h0 killed $h0 def $q0
-; AARCH64-NEXT: // kill: def $h1 killed $h1 def $q1
-; AARCH64-NEXT: // kill: def $h2 killed $h2 def $q2
-; AARCH64-NEXT: add x9, sp, #16
-; AARCH64-NEXT: // kill: def $h3 killed $h3 def $q3
-; AARCH64-NEXT: // kill: def $h4 killed $h4 def $q4
-; AARCH64-NEXT: // kill: def $h5 killed $h5 def $q5
-; AARCH64-NEXT: // kill: def $h6 killed $h6 def $q6
-; AARCH64-NEXT: // kill: def $h7 killed $h7 def $q7
-; AARCH64-NEXT: mov v0.h[1], v1.h[0]
-; AARCH64-NEXT: ldr h1, [sp, #8]
-; AARCH64-NEXT: ld1 { v1.h }[1], [x9]
-; AARCH64-NEXT: add x9, sp, #24
-; AARCH64-NEXT: mov v0.h[2], v2.h[0]
-; AARCH64-NEXT: ldr h2, [sp]
-; AARCH64-NEXT: ld1 { v1.h }[2], [x9]
-; AARCH64-NEXT: add x9, sp, #32
-; AARCH64-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; AARCH64-NEXT: mov v0.h[3], v3.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[3], [x9]
-; AARCH64-NEXT: add x9, sp, #40
-; AARCH64-NEXT: ldr h3, [sp, #72]
-; AARCH64-NEXT: ld1 { v1.h }[4], [x9]
-; AARCH64-NEXT: add x9, sp, #48
-; AARCH64-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; AARCH64-NEXT: mov v0.h[4], v4.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[5], [x9]
-; AARCH64-NEXT: add x9, sp, #56
-; AARCH64-NEXT: fmaxnm v2.8h, v2.8h, v3.8h
-; AARCH64-NEXT: mov v0.h[5], v5.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[6], [x9]
-; AARCH64-NEXT: add x9, sp, #64
-; AARCH64-NEXT: str h2, [x8, #16]
-; AARCH64-NEXT: mov v0.h[6], v6.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[7], [x9]
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; AARCH64-NEXT: mov v0.h[7], v7.h[0]
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; AARCH64-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: str q0, [x8]
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_v9f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; FULLFP16-NEXT: add x9, sp, #16
+; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; FULLFP16-NEXT: ldr h1, [sp, #8]
+; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
+; FULLFP16-NEXT: add x9, sp, #24
+; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; FULLFP16-NEXT: ldr h2, [sp]
+; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
+; FULLFP16-NEXT: add x9, sp, #32
+; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
+; FULLFP16-NEXT: add x9, sp, #40
+; FULLFP16-NEXT: ldr h3, [sp, #72]
+; FULLFP16-NEXT: ld1 { v1.h }[4], [x9]
+; FULLFP16-NEXT: add x9, sp, #48
+; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[5], [x9]
+; FULLFP16-NEXT: add x9, sp, #56
+; FULLFP16-NEXT: fmaxnm v2.8h, v2.8h, v3.8h
+; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[6], [x9]
+; FULLFP16-NEXT: add x9, sp, #64
+; FULLFP16-NEXT: str h2, [x8, #16]
+; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[7], [x9]
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: str q0, [x8]
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_v9f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: ldr h16, [sp, #16]
+; NOFULLFP16-NEXT: ldr h17, [sp, #8]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: ldr h18, [sp, #24]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fmaxnm s1, s1, s16
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s17
+; NOFULLFP16-NEXT: ldr h16, [sp, #32]
+; NOFULLFP16-NEXT: fmaxnm s2, s2, s18
+; NOFULLFP16-NEXT: ldr h17, [sp, #40]
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fmaxnm s3, s3, s16
+; NOFULLFP16-NEXT: fmaxnm s4, s4, s17
+; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; NOFULLFP16-NEXT: ldr h1, [sp, #48]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: ldr h2, [sp, #56]
+; NOFULLFP16-NEXT: fmaxnm s1, s5, s1
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: ldr h5, [sp, #64]
+; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: ldr h6, [sp, #72]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h5
+; NOFULLFP16-NEXT: fcvt s4, h7
+; NOFULLFP16-NEXT: ldr h5, [sp]
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fmaxnm s2, s4, s3
+; NOFULLFP16-NEXT: fmaxnm s3, s5, s6
+; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
+; NOFULLFP16-NEXT: str h2, [x8, #16]
+; NOFULLFP16-NEXT: str q0, [x8]
+; NOFULLFP16-NEXT: ret
entry:
%c = call <9 x half> @llvm.maximumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @max_v16f16(<16 x half> %a, <16 x half> %b) {
-; AARCH64-LABEL: max_v16f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; AARCH64-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; AARCH64-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
-; AARCH64-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: max_v16f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
+; FULLFP16-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: max_v16f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h6, v2.h[1]
+; NOFULLFP16-NEXT: mov h7, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h2
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h16, v3.h[1]
+; NOFULLFP16-NEXT: mov h17, v1.h[1]
+; NOFULLFP16-NEXT: mov h18, v2.h[2]
+; NOFULLFP16-NEXT: mov h19, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s20, h3
+; NOFULLFP16-NEXT: fcvt s21, h1
+; NOFULLFP16-NEXT: mov h22, v3.h[2]
+; NOFULLFP16-NEXT: mov h23, v1.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h24, v0.h[6]
+; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt s5, h16
+; NOFULLFP16-NEXT: fcvt s16, h17
+; NOFULLFP16-NEXT: fcvt s17, h18
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: mov h19, v0.h[3]
+; NOFULLFP16-NEXT: fmaxnm s20, s21, s20
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: mov h22, v3.h[3]
+; NOFULLFP16-NEXT: fmaxnm s6, s7, s6
+; NOFULLFP16-NEXT: mov h7, v2.h[3]
+; NOFULLFP16-NEXT: mov h25, v1.h[6]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: fmaxnm s5, s16, s5
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: mov h23, v1.h[3]
+; NOFULLFP16-NEXT: fmaxnm s17, s18, s17
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt h19, s5
+; NOFULLFP16-NEXT: fcvt h5, s20
+; NOFULLFP16-NEXT: fmaxnm s16, s16, s21
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: mov h21, v2.h[4]
+; NOFULLFP16-NEXT: mov h23, v1.h[4]
+; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h22
+; NOFULLFP16-NEXT: mov h22, v0.h[4]
+; NOFULLFP16-NEXT: fmaxnm s7, s18, s7
+; NOFULLFP16-NEXT: mov h18, v3.h[4]
+; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
+; NOFULLFP16-NEXT: fcvt h16, s16
+; NOFULLFP16-NEXT: fmaxnm s6, s20, s6
+; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
+; NOFULLFP16-NEXT: fcvt s17, h21
+; NOFULLFP16-NEXT: fcvt s19, h22
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: mov h21, v2.h[5]
+; NOFULLFP16-NEXT: mov h22, v0.h[5]
+; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
+; NOFULLFP16-NEXT: mov h16, v3.h[5]
+; NOFULLFP16-NEXT: mov h23, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: fmaxnm s17, s19, s17
+; NOFULLFP16-NEXT: mov h19, v2.h[6]
+; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
+; NOFULLFP16-NEXT: fmaxnm s18, s20, s18
+; NOFULLFP16-NEXT: mov h20, v3.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h21
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: fcvt s22, h24
+; NOFULLFP16-NEXT: mov h2, v2.h[7]
+; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h16
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: fcvt s19, h19
+; NOFULLFP16-NEXT: fcvt s23, h25
+; NOFULLFP16-NEXT: fcvt h18, s18
+; NOFULLFP16-NEXT: fcvt s20, h20
+; NOFULLFP16-NEXT: mov h3, v3.h[7]
+; NOFULLFP16-NEXT: fmaxnm s7, s21, s7
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fmaxnm s6, s16, s6
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
+; NOFULLFP16-NEXT: fmaxnm s16, s22, s19
+; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
+; NOFULLFP16-NEXT: fmaxnm s17, s23, s20
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fmaxnm s0, s0, s2
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt h2, s16
+; NOFULLFP16-NEXT: fmaxnm s1, s1, s3
+; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
+; NOFULLFP16-NEXT: fcvt h6, s17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
+; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
+; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v4.16b
+; NOFULLFP16-NEXT: mov v1.16b, v5.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
@@ -922,112 +1826,413 @@ entry:
;;;;;;;;;;;;;;;;;; min_f16
define half @min_f16(half %a, half %b) {
-; AARCH64-LABEL: min_f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm h1, h1, h1
-; AARCH64-NEXT: fminnm h0, h0, h0
-; AARCH64-NEXT: fminnm h0, h0, h1
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm h1, h1, h1
+; FULLFP16-NEXT: fminnm h0, h0, h0
+; FULLFP16-NEXT: fminnm h0, h0, h1
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fminnm s0, s0, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: ret
entry:
%c = call half @llvm.minimumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @min_v2f16(<2 x half> %a, <2 x half> %b) {
-; AARCH64-LABEL: min_v2f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_v2f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_v2f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fminnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fminnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fminnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fminnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @min_v4f16(<4 x half> %a, <4 x half> %b) {
-; AARCH64-LABEL: min_v4f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; AARCH64-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_v4f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_v4f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: mov h4, v1.h[2]
+; NOFULLFP16-NEXT: mov h5, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h1
+; NOFULLFP16-NEXT: fcvt s7, h0
+; NOFULLFP16-NEXT: mov h1, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fminnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h4
+; NOFULLFP16-NEXT: fcvt s4, h5
+; NOFULLFP16-NEXT: fminnm s5, s7, s6
+; NOFULLFP16-NEXT: mov h6, v0.h[3]
+; NOFULLFP16-NEXT: fminnm s3, s4, s3
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fcvt h0, s5
+; NOFULLFP16-NEXT: fcvt s4, h6
+; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: fminnm s1, s4, s1
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
+; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; NOFULLFP16-NEXT: ret
entry:
%c = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @min_v8f16(<8 x half> %a, <8 x half> %b) {
-; AARCH64-LABEL: min_v8f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_v8f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_v8f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h2, v1.h[1]
+; NOFULLFP16-NEXT: mov h3, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h1
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h6, v1.h[2]
+; NOFULLFP16-NEXT: mov h7, v0.h[2]
+; NOFULLFP16-NEXT: mov h16, v1.h[3]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fminnm s4, s5, s4
+; NOFULLFP16-NEXT: mov h5, v0.h[3]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fminnm s3, s3, s2
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fcvt h2, s4
+; NOFULLFP16-NEXT: fminnm s4, s7, s6
+; NOFULLFP16-NEXT: mov h6, v1.h[4]
+; NOFULLFP16-NEXT: mov h7, v0.h[4]
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fminnm s5, s5, s16
+; NOFULLFP16-NEXT: mov h16, v0.h[5]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: fcvt s6, h7
+; NOFULLFP16-NEXT: mov h7, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h5, s5
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
+; NOFULLFP16-NEXT: mov h4, v1.h[6]
+; NOFULLFP16-NEXT: fminnm s3, s6, s3
+; NOFULLFP16-NEXT: mov h6, v0.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt s5, h6
+; NOFULLFP16-NEXT: fminnm s6, s16, s7
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
+; NOFULLFP16-NEXT: fminnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt h3, s6
+; NOFULLFP16-NEXT: fminnm s0, s0, s1
+; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
+; NOFULLFP16-NEXT: fcvt h3, s4
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
+; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v2.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @min_v9f16(<9 x half> %a, <9 x half> %b) {
-; AARCH64-LABEL: min_v9f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $h0 killed $h0 def $q0
-; AARCH64-NEXT: // kill: def $h1 killed $h1 def $q1
-; AARCH64-NEXT: // kill: def $h2 killed $h2 def $q2
-; AARCH64-NEXT: add x9, sp, #16
-; AARCH64-NEXT: // kill: def $h3 killed $h3 def $q3
-; AARCH64-NEXT: // kill: def $h4 killed $h4 def $q4
-; AARCH64-NEXT: // kill: def $h5 killed $h5 def $q5
-; AARCH64-NEXT: // kill: def $h6 killed $h6 def $q6
-; AARCH64-NEXT: // kill: def $h7 killed $h7 def $q7
-; AARCH64-NEXT: mov v0.h[1], v1.h[0]
-; AARCH64-NEXT: ldr h1, [sp, #8]
-; AARCH64-NEXT: ld1 { v1.h }[1], [x9]
-; AARCH64-NEXT: add x9, sp, #24
-; AARCH64-NEXT: mov v0.h[2], v2.h[0]
-; AARCH64-NEXT: ldr h2, [sp]
-; AARCH64-NEXT: ld1 { v1.h }[2], [x9]
-; AARCH64-NEXT: add x9, sp, #32
-; AARCH64-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; AARCH64-NEXT: mov v0.h[3], v3.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[3], [x9]
-; AARCH64-NEXT: add x9, sp, #40
-; AARCH64-NEXT: ldr h3, [sp, #72]
-; AARCH64-NEXT: ld1 { v1.h }[4], [x9]
-; AARCH64-NEXT: add x9, sp, #48
-; AARCH64-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; AARCH64-NEXT: mov v0.h[4], v4.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[5], [x9]
-; AARCH64-NEXT: add x9, sp, #56
-; AARCH64-NEXT: fminnm v2.8h, v2.8h, v3.8h
-; AARCH64-NEXT: mov v0.h[5], v5.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[6], [x9]
-; AARCH64-NEXT: add x9, sp, #64
-; AARCH64-NEXT: str h2, [x8, #16]
-; AARCH64-NEXT: mov v0.h[6], v6.h[0]
-; AARCH64-NEXT: ld1 { v1.h }[7], [x9]
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; AARCH64-NEXT: mov v0.h[7], v7.h[0]
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; AARCH64-NEXT: str q0, [x8]
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_v9f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; FULLFP16-NEXT: add x9, sp, #16
+; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; FULLFP16-NEXT: ldr h1, [sp, #8]
+; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
+; FULLFP16-NEXT: add x9, sp, #24
+; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; FULLFP16-NEXT: ldr h2, [sp]
+; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
+; FULLFP16-NEXT: add x9, sp, #32
+; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
+; FULLFP16-NEXT: add x9, sp, #40
+; FULLFP16-NEXT: ldr h3, [sp, #72]
+; FULLFP16-NEXT: ld1 { v1.h }[4], [x9]
+; FULLFP16-NEXT: add x9, sp, #48
+; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[5], [x9]
+; FULLFP16-NEXT: add x9, sp, #56
+; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v3.8h
+; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[6], [x9]
+; FULLFP16-NEXT: add x9, sp, #64
+; FULLFP16-NEXT: str h2, [x8, #16]
+; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
+; FULLFP16-NEXT: ld1 { v1.h }[7], [x9]
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; FULLFP16-NEXT: str q0, [x8]
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_v9f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: ldr h16, [sp, #16]
+; NOFULLFP16-NEXT: ldr h17, [sp, #8]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: ldr h18, [sp, #24]
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s4, h4
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: fminnm s1, s1, s16
+; NOFULLFP16-NEXT: fminnm s0, s0, s17
+; NOFULLFP16-NEXT: ldr h16, [sp, #32]
+; NOFULLFP16-NEXT: fminnm s2, s2, s18
+; NOFULLFP16-NEXT: ldr h17, [sp, #40]
+; NOFULLFP16-NEXT: fcvt s16, h16
+; NOFULLFP16-NEXT: fcvt s17, h17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: fcvt h2, s2
+; NOFULLFP16-NEXT: fminnm s3, s3, s16
+; NOFULLFP16-NEXT: fminnm s4, s4, s17
+; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
+; NOFULLFP16-NEXT: ldr h1, [sp, #48]
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: fcvt h3, s3
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
+; NOFULLFP16-NEXT: ldr h2, [sp, #56]
+; NOFULLFP16-NEXT: fminnm s1, s5, s1
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: ldr h5, [sp, #64]
+; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
+; NOFULLFP16-NEXT: fcvt s3, h6
+; NOFULLFP16-NEXT: ldr h6, [sp, #72]
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
+; NOFULLFP16-NEXT: fminnm s2, s3, s2
+; NOFULLFP16-NEXT: fcvt s3, h5
+; NOFULLFP16-NEXT: fcvt s4, h7
+; NOFULLFP16-NEXT: ldr h5, [sp]
+; NOFULLFP16-NEXT: fcvt s5, h5
+; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fminnm s2, s4, s3
+; NOFULLFP16-NEXT: fminnm s3, s5, s6
+; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
+; NOFULLFP16-NEXT: fcvt h1, s2
+; NOFULLFP16-NEXT: fcvt h2, s3
+; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
+; NOFULLFP16-NEXT: str h2, [x8, #16]
+; NOFULLFP16-NEXT: str q0, [x8]
+; NOFULLFP16-NEXT: ret
entry:
%c = call <9 x half> @llvm.minimumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @min_v16f16(<16 x half> %a, <16 x half> %b) {
-; AARCH64-LABEL: min_v16f16:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; AARCH64-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; AARCH64-NEXT: fminnm v0.8h, v0.8h, v2.8h
-; AARCH64-NEXT: fminnm v1.8h, v1.8h, v3.8h
-; AARCH64-NEXT: ret
+; FULLFP16-LABEL: min_v16f16:
+; FULLFP16: // %bb.0: // %entry
+; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v2.8h
+; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v3.8h
+; FULLFP16-NEXT: ret
+;
+; NOFULLFP16-LABEL: min_v16f16:
+; NOFULLFP16: // %bb.0: // %entry
+; NOFULLFP16-NEXT: mov h6, v2.h[1]
+; NOFULLFP16-NEXT: mov h7, v0.h[1]
+; NOFULLFP16-NEXT: fcvt s4, h2
+; NOFULLFP16-NEXT: fcvt s5, h0
+; NOFULLFP16-NEXT: mov h16, v3.h[1]
+; NOFULLFP16-NEXT: mov h17, v1.h[1]
+; NOFULLFP16-NEXT: mov h18, v2.h[2]
+; NOFULLFP16-NEXT: mov h19, v0.h[2]
+; NOFULLFP16-NEXT: fcvt s20, h3
+; NOFULLFP16-NEXT: fcvt s21, h1
+; NOFULLFP16-NEXT: mov h22, v3.h[2]
+; NOFULLFP16-NEXT: mov h23, v1.h[2]
+; NOFULLFP16-NEXT: fcvt s6, h6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: mov h24, v0.h[6]
+; NOFULLFP16-NEXT: fminnm s4, s5, s4
+; NOFULLFP16-NEXT: fcvt s5, h16
+; NOFULLFP16-NEXT: fcvt s16, h17
+; NOFULLFP16-NEXT: fcvt s17, h18
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: mov h19, v0.h[3]
+; NOFULLFP16-NEXT: fminnm s20, s21, s20
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: mov h22, v3.h[3]
+; NOFULLFP16-NEXT: fminnm s6, s7, s6
+; NOFULLFP16-NEXT: mov h7, v2.h[3]
+; NOFULLFP16-NEXT: mov h25, v1.h[6]
+; NOFULLFP16-NEXT: fcvt h4, s4
+; NOFULLFP16-NEXT: fminnm s5, s16, s5
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: mov h23, v1.h[3]
+; NOFULLFP16-NEXT: fminnm s17, s18, s17
+; NOFULLFP16-NEXT: fcvt s18, h19
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt s7, h7
+; NOFULLFP16-NEXT: fcvt h19, s5
+; NOFULLFP16-NEXT: fcvt h5, s20
+; NOFULLFP16-NEXT: fminnm s16, s16, s21
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: mov h21, v2.h[4]
+; NOFULLFP16-NEXT: mov h23, v1.h[4]
+; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h22
+; NOFULLFP16-NEXT: mov h22, v0.h[4]
+; NOFULLFP16-NEXT: fminnm s7, s18, s7
+; NOFULLFP16-NEXT: mov h18, v3.h[4]
+; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
+; NOFULLFP16-NEXT: fcvt h16, s16
+; NOFULLFP16-NEXT: fminnm s6, s20, s6
+; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
+; NOFULLFP16-NEXT: fcvt s17, h21
+; NOFULLFP16-NEXT: fcvt s19, h22
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fcvt s18, h18
+; NOFULLFP16-NEXT: fcvt s20, h23
+; NOFULLFP16-NEXT: mov h21, v2.h[5]
+; NOFULLFP16-NEXT: mov h22, v0.h[5]
+; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
+; NOFULLFP16-NEXT: mov h16, v3.h[5]
+; NOFULLFP16-NEXT: mov h23, v1.h[5]
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: mov h0, v0.h[7]
+; NOFULLFP16-NEXT: mov h1, v1.h[7]
+; NOFULLFP16-NEXT: fminnm s17, s19, s17
+; NOFULLFP16-NEXT: mov h19, v2.h[6]
+; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
+; NOFULLFP16-NEXT: fminnm s18, s20, s18
+; NOFULLFP16-NEXT: mov h20, v3.h[6]
+; NOFULLFP16-NEXT: fcvt s7, h21
+; NOFULLFP16-NEXT: fcvt s21, h22
+; NOFULLFP16-NEXT: fcvt s22, h24
+; NOFULLFP16-NEXT: mov h2, v2.h[7]
+; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
+; NOFULLFP16-NEXT: fcvt s6, h16
+; NOFULLFP16-NEXT: fcvt s16, h23
+; NOFULLFP16-NEXT: fcvt h17, s17
+; NOFULLFP16-NEXT: fcvt s19, h19
+; NOFULLFP16-NEXT: fcvt s23, h25
+; NOFULLFP16-NEXT: fcvt h18, s18
+; NOFULLFP16-NEXT: fcvt s20, h20
+; NOFULLFP16-NEXT: mov h3, v3.h[7]
+; NOFULLFP16-NEXT: fminnm s7, s21, s7
+; NOFULLFP16-NEXT: fcvt s2, h2
+; NOFULLFP16-NEXT: fcvt s0, h0
+; NOFULLFP16-NEXT: fminnm s6, s16, s6
+; NOFULLFP16-NEXT: fcvt s1, h1
+; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
+; NOFULLFP16-NEXT: fminnm s16, s22, s19
+; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
+; NOFULLFP16-NEXT: fminnm s17, s23, s20
+; NOFULLFP16-NEXT: fcvt s3, h3
+; NOFULLFP16-NEXT: fcvt h7, s7
+; NOFULLFP16-NEXT: fminnm s0, s0, s2
+; NOFULLFP16-NEXT: fcvt h6, s6
+; NOFULLFP16-NEXT: fcvt h2, s16
+; NOFULLFP16-NEXT: fminnm s1, s1, s3
+; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
+; NOFULLFP16-NEXT: fcvt h0, s0
+; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
+; NOFULLFP16-NEXT: fcvt h6, s17
+; NOFULLFP16-NEXT: fcvt h1, s1
+; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
+; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
+; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
+; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
+; NOFULLFP16-NEXT: mov v0.16b, v4.16b
+; NOFULLFP16-NEXT: mov v1.16b, v5.16b
+; NOFULLFP16-NEXT: ret
entry:
%c = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
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