[llvm] [InstCombine] Combine and->cmp->sel->or-disjoint into and->mul (PR #135274)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 14 18:11:58 PDT 2025
================
@@ -3643,6 +3643,67 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
foldAddLikeCommutative(I.getOperand(1), I.getOperand(0),
/*NSW=*/true, /*NUW=*/true))
return R;
+
+ Value *Cond0 = nullptr, *Cond1 = nullptr;
+ const APInt *Op0True = nullptr, *Op0False = nullptr;
+ const APInt *Op1True = nullptr, *Op1False = nullptr;
+
+ // (!(A & N) ? 0 : N * C) + (!(A & M) ? 0 : M * C) -> A & (N + M) * C
+ if (match(I.getOperand(0),
+ m_Select(m_Value(Cond0), m_APInt(Op0True), m_APInt(Op0False))) &&
+ match(I.getOperand(1),
+ m_Select(m_Value(Cond1), m_APInt(Op1True), m_APInt(Op1False))) &&
+ Op0True->isZero() && Op1True->isZero()) {
+ CmpPredicate Pred0, Pred1;
+
+ if (ICmpInst *ICL = dyn_cast<ICmpInst>(Cond0);
+ ICmpInst *ICR = dyn_cast<ICmpInst>(Cond1)) {
+ auto LHSDecompose =
+ decomposeBitTestICmp(ICL->getOperand(0), ICL->getOperand(1),
+ ICL->getPredicate(), true, true, true);
+ auto RHSDecompose =
+ decomposeBitTestICmp(ICR->getOperand(0), ICR->getOperand(1),
+ ICR->getPredicate(), true, true, true);
+ if (LHSDecompose && RHSDecompose &&
+ LHSDecompose->Pred == RHSDecompose->Pred &&
+ (LHSDecompose->Pred == ICmpInst::ICMP_EQ ||
+ LHSDecompose->Pred == ICmpInst::ICMP_NE) &&
+ ((LHSDecompose->Mask & RHSDecompose->Mask) ==
+ APInt::getZero(LHSDecompose->Mask.getBitWidth())) &&
----------------
dtcxzyw wrote:
```suggestion
LHSDecompose->Mask != RHSDecompose->Mask &&
```
You can simply compare two power-of-2 masks.
https://github.com/llvm/llvm-project/pull/135274
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