[llvm] [AMDGPU][MC] test update with script for vinterp asm test (PR #135681)

[Brox Chen via llvm-commits]

https://github.com/broxigarchen created https://github.com/llvm/llvm-project/pull/135681

This is a NFC patch.

Run test update with script with --unique options for many gfx11/gfx12 mc test. This reduce duplications. This prepares for the upcoming true16 clean up patch

>From 2dc4f29098d850ef5cd3c10226e7910982ade341 Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Mon, 14 Apr 2025 17:07:24 -0400
Subject: [PATCH] run unique

---
 llvm/test/MC/AMDGPU/vinterp.s | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/llvm/test/MC/AMDGPU/vinterp.s b/llvm/test/MC/AMDGPU/vinterp.s
index 8ad947edf7896..f224086b1c056 100644
--- a/llvm/test/MC/AMDGPU/vinterp.s
+++ b/llvm/test/MC/AMDGPU/vinterp.s
@@ -1,4 +1,4 @@
-// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -show-encoding %s | FileCheck -check-prefix=GCN %s
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -show-encoding %s | FileCheck -check-prefix=GCN %s
 
@@ -98,9 +98,6 @@ v_interp_p10_f16_f32 v0, v1.l, v2, v3.l wait_exp:1
 v_interp_p10_f16_f32 v0, v1.l, v2, v3.l wait_exp:7
 // GCN: v_interp_p10_f16_f32 v0, v1.l, v2, v3.l wait_exp:7 ; encoding: [0x00,0x07,0x02,0xcd,0x01,0x05,0x0e,0x04]
 
-v_interp_p10_f16_f32 v0, v1.l, v2, v3.l
-// GCN: v_interp_p10_f16_f32 v0, v1.l, v2, v3.l wait_exp:0 ; encoding: [0x00,0x00,0x02,0xcd,0x01,0x05,0x0e,0x04]
-
 v_interp_p10_f16_f32 v0, v1.h, v2, v3.l
 // GCN: v_interp_p10_f16_f32 v0, v1.h, v2, v3.l wait_exp:0 ; encoding: [0x00,0x08,0x02,0xcd,0x01,0x05,0x0e,0x04]
 
@@ -137,9 +134,6 @@ v_interp_p2_f16_f32 v0.l, v1.l, v2, v3 wait_exp:1
 v_interp_p2_f16_f32 v0.l, v1.l, v2, v3 wait_exp:7
 // GCN: v_interp_p2_f16_f32 v0.l, v1.l, v2, v3 wait_exp:7 ; encoding: [0x00,0x07,0x03,0xcd,0x01,0x05,0x0e,0x04]
 
-v_interp_p2_f16_f32 v0.l, v1.l, v2, v3
-// GCN: v_interp_p2_f16_f32 v0.l, v1.l, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x03,0xcd,0x01,0x05,0x0e,0x04]
-
 v_interp_p2_f16_f32 v0.l, v1.h, v2, v3
 // GCN: v_interp_p2_f16_f32 v0.l, v1.h, v2, v3 wait_exp:0 ; encoding: [0x00,0x08,0x03,0xcd,0x01,0x05,0x0e,0x04]
 
@@ -179,9 +173,6 @@ v_interp_p10_rtz_f16_f32 v0, v1.l, v2, v3.l wait_exp:1
 v_interp_p10_rtz_f16_f32 v0, v1.l, v2, v3.l wait_exp:7
 // GCN: v_interp_p10_rtz_f16_f32 v0, v1.l, v2, v3.l wait_exp:7 ; encoding: [0x00,0x07,0x04,0xcd,0x01,0x05,0x0e,0x04]
 
-v_interp_p10_rtz_f16_f32 v0, v1.l, v2, v3.l
-// GCN: v_interp_p10_rtz_f16_f32 v0, v1.l, v2, v3.l wait_exp:0 ; encoding: [0x00,0x00,0x04,0xcd,0x01,0x05,0x0e,0x04]
-
 v_interp_p10_rtz_f16_f32 v0, v1.h, v2, v3.l
 // GCN: v_interp_p10_rtz_f16_f32 v0, v1.h, v2, v3.l wait_exp:0 ; encoding: [0x00,0x08,0x04,0xcd,0x01,0x05,0x0e,0x04]
 
@@ -218,9 +209,6 @@ v_interp_p2_rtz_f16_f32 v0.l, v1.l, v2, v3 wait_exp:1
 v_interp_p2_rtz_f16_f32 v0.l, v1.l, v2, v3 wait_exp:7
 // GCN: v_interp_p2_rtz_f16_f32 v0.l, v1.l, v2, v3 wait_exp:7 ; encoding: [0x00,0x07,0x05,0xcd,0x01,0x05,0x0e,0x04]
 
-v_interp_p2_rtz_f16_f32 v0.l, v1.l, v2, v3
-// GCN: v_interp_p2_rtz_f16_f32 v0.l, v1.l, v2, v3 wait_exp:0 ; encoding: [0x00,0x00,0x05,0xcd,0x01,0x05,0x0e,0x04]
-
 v_interp_p2_rtz_f16_f32 v0.l, v1.h, v2, v3
 // GCN: v_interp_p2_rtz_f16_f32 v0.l, v1.h, v2, v3 wait_exp:0 ; encoding: [0x00,0x08,0x05,0xcd,0x01,0x05,0x0e,0x04]