[llvm] [AArch64][SVE] Fold ADD+CNTB to INCB and DECB (PR #118280)

[Ricardo Jesus via llvm-commits]

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@@ -65,7 +65,8 @@ define void @quux() #1 {
 ; CHECK-NEXT:    mov sp, x9
 ; CHECK-NEXT:    sub x10, x29, #104
 ; CHECK-NEXT:    stur x9, [x10, #-256] // 8-byte Folded Spill
-; CHECK-NEXT:    addvl x9, x8, #1
+; CHECK-NEXT:    mov x9, x8
+; CHECK-NEXT:    incb x9
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rj-jesus wrote:

I've added `HasFastIncVL` (and `FeatureDisableFastIncVL`) to control this - is this what you had in mind?
I'm happy to invert the logic of `FeatureDisableFastIncVL` if you'd rather have it enabled on a CPU-by-CPU basis (presumably, based on the SWOGs, at least for the Neoverse V2 and Neoverse V3).

https://github.com/llvm/llvm-project/pull/118280