[llvm] [ConstraintElim] Simplify cmp after uadd.sat/usub.sat (PR #135603)

[via llvm-commits]

https://github.com/el-ev created https://github.com/llvm/llvm-project/pull/135603

- Closes #135557

>From 37a41034b83395a3691193bf2e78b8d107ebf627 Mon Sep 17 00:00:00 2001
From: Iris Shi <0.0 at owo.li>
Date: Mon, 14 Apr 2025 17:15:46 +0800
Subject: [PATCH 1/2] pre-commit test

---
 .../ConstraintElimination/uadd-usub-sat.ll    | 38 +++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll

diff --git a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
new file mode 100644
index 0000000000000..89a0a7717979d
--- /dev/null
+++ b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s
+
+declare i64 @llvm.uadd.sat.i64(i64, i64)
+declare i64 @llvm.usub.sat.i64(i64, i64)
+
+define i1 @uadd_sat_uge(i64 %a, i64 %b) {
+; CHECK-LABEL: define i1 @uadd_sat_uge(
+; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ugt i64 [[A]], [[B]]
+; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT:    [[ADD_SAT:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 1)
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[ADD_SAT]], [[B]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %precond = icmp ugt i64 %a, %b
+  call void @llvm.assume(i1 %precond)
+  %add.sat = call i64 @llvm.uadd.sat.i64(i64 %a, i64 1)
+  %cmp = icmp ugt i64 %add.sat, %b
+  ret i1 %cmp
+}
+
+
+define i1 @usub_sat_ule(i64 %a, i64 %b) {
+; CHECK-LABEL: define i1 @usub_sat_ule(
+; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ult i64 [[A]], [[B]]
+; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 1)
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[SUB_SAT]], [[B]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %precond = icmp ult i64 %a, %b
+  call void @llvm.assume(i1 %precond)
+  %sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 1)
+  %cmp = icmp ult i64 %sub.sat, %b
+  ret i1 %cmp
+}

>From 3f7fc12e018ca63f029fbf1f561d94bba2e6f23b Mon Sep 17 00:00:00 2001
From: Iris Shi <0.0 at owo.li>
Date: Mon, 14 Apr 2025 17:19:32 +0800
Subject: [PATCH 2/2] [ConstraintElim] Simplify cmp after uadd.sat/usub.sat

---
 .../Transforms/Scalar/ConstraintElimination.cpp | 17 ++++++++++++++++-
 .../ConstraintElimination/uadd-usub-sat.ll      |  6 ++----
 2 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 456f5086309cf..ea03b6e5d5570 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -1141,6 +1141,8 @@ void State::addInfoFor(BasicBlock &BB) {
         break;
       [[fallthrough]];
     case Intrinsic::abs:
+    case Intrinsic::uadd_sat:
+    case Intrinsic::usub_sat:
       WorkList.push_back(FactOrCheck::getInstFact(DT.getNode(&BB), &I));
       break;
     }
@@ -1891,13 +1893,26 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT, LoopInfo &LI,
         AddFact(CmpInst::ICMP_SGE, CB.Inst, X);
         continue;
       }
-
       if (auto *MinMax = dyn_cast<MinMaxIntrinsic>(CB.Inst)) {
         Pred = ICmpInst::getNonStrictPredicate(MinMax->getPredicate());
         AddFact(Pred, MinMax, MinMax->getLHS());
         AddFact(Pred, MinMax, MinMax->getRHS());
         continue;
       }
+      if (auto *SatI = dyn_cast<SaturatingInst>(CB.Inst)) {
+        switch (SatI->getIntrinsicID()) {
+        default:
+          continue;
+        case Intrinsic::uadd_sat:
+          Pred = ICmpInst::ICMP_UGE;
+          break;
+        case Intrinsic::usub_sat:
+          Pred = ICmpInst::ICMP_ULE;
+          break;
+        }
+        AddFact(Pred, SatI, SatI->getLHS());
+        continue;
+      }
     }
 
     Value *A = nullptr, *B = nullptr;
diff --git a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
index 89a0a7717979d..ec30795a3e95a 100644
--- a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
+++ b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
@@ -10,8 +10,7 @@ define i1 @uadd_sat_uge(i64 %a, i64 %b) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ugt i64 [[A]], [[B]]
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
 ; CHECK-NEXT:    [[ADD_SAT:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 1)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[ADD_SAT]], [[B]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %precond = icmp ugt i64 %a, %b
   call void @llvm.assume(i1 %precond)
@@ -27,8 +26,7 @@ define i1 @usub_sat_ule(i64 %a, i64 %b) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ult i64 [[A]], [[B]]
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
 ; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 1)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[SUB_SAT]], [[B]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %precond = icmp ult i64 %a, %b
   call void @llvm.assume(i1 %precond)