[llvm] [AMDGPU] Enable vectorization of i8 values. (PR #134934)

[Shilei Tian via llvm-commits]

================
@@ -0,0 +1,88 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -passes=slp-vectorizer %s | FileCheck -check-prefixes=GFX7 %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -passes=slp-vectorizer %s | FileCheck -check-prefixes=GFX8PLUS,GFX8 %s
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=slp-vectorizer %s | FileCheck -check-prefixes=GFX8PLUS,GFX9 %s
+
+define protected amdgpu_kernel void @phi(ptr addrspace(3) %inptr0, ptr addrspace(3) %inptr1, ptr %out, ptr %out1, i32 %flag) {
+; GFX7-LABEL: define protected amdgpu_kernel void @phi(
+; GFX7-SAME: ptr addrspace(3) [[INPTR0:%.*]], ptr addrspace(3) [[INPTR1:%.*]], ptr [[OUT:%.*]], ptr [[OUT1:%.*]], i32 [[FLAG:%.*]]) #[[ATTR0:[0-9]+]] {
+; GFX7-NEXT:  [[ENTRY:.*]]:
+; GFX7-NEXT:    [[GEP0:%.*]] = getelementptr i8, ptr addrspace(3) [[INPTR0]], i32 0
+; GFX7-NEXT:    [[TMP0:%.*]] = load <4 x i8>, ptr addrspace(3) [[GEP0]], align 8
+; GFX7-NEXT:    br label %[[DO_BODY:.*]]
+; GFX7:       [[DO_BODY]]:
+; GFX7-NEXT:    [[TMP1:%.*]] = phi <4 x i8> [ [[TMP0]], %[[ENTRY]] ], [ [[TMP2:%.*]], %[[DO_BODY]] ]
+; GFX7-NEXT:    [[TMP2]] = load <4 x i8>, ptr addrspace(3) [[GEP0]], align 8
+; GFX7-NEXT:    [[VEC03:%.*]] = shufflevector <4 x i8> [[TMP2]], <4 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; GFX7-NEXT:    [[VEC13:%.*]] = shufflevector <4 x i8> [[TMP1]], <4 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; GFX7-NEXT:    store <16 x i8> [[VEC13]], ptr addrspace(3) [[INPTR1]], align 2
+; GFX7-NEXT:    [[CMP:%.*]] = icmp eq i32 [[FLAG]], 0
+; GFX7-NEXT:    br i1 [[CMP]], label %[[EXIT:.*]], label %[[DO_BODY]]
+; GFX7:       [[EXIT]]:
+; GFX7-NEXT:    store <16 x i8> [[VEC13]], ptr [[OUT]], align 16
+; GFX7-NEXT:    store <16 x i8> [[VEC03]], ptr [[OUT1]], align 16
+; GFX7-NEXT:    ret void
+;
+; GFX8PLUS-LABEL: define protected amdgpu_kernel void @phi(
+; GFX8PLUS-SAME: ptr addrspace(3) [[INPTR0:%.*]], ptr addrspace(3) [[INPTR1:%.*]], ptr [[OUT:%.*]], ptr [[OUT1:%.*]], i32 [[FLAG:%.*]]) #[[ATTR0:[0-9]+]] {
+; GFX8PLUS-NEXT:  [[ENTRY:.*]]:
+; GFX8PLUS-NEXT:    [[GEP0:%.*]] = getelementptr i8, ptr addrspace(3) [[INPTR0]], i32 0
+; GFX8PLUS-NEXT:    [[TMP0:%.*]] = load <4 x i8>, ptr addrspace(3) [[GEP0]], align 8
+; GFX8PLUS-NEXT:    br label %[[DO_BODY:.*]]
+; GFX8PLUS:       [[DO_BODY]]:
+; GFX8PLUS-NEXT:    [[TMP1:%.*]] = phi <4 x i8> [ [[TMP0]], %[[ENTRY]] ], [ [[TMP2:%.*]], %[[DO_BODY]] ]
+; GFX8PLUS-NEXT:    [[TMP2]] = load <4 x i8>, ptr addrspace(3) [[GEP0]], align 8
+; GFX8PLUS-NEXT:    [[VEC03:%.*]] = shufflevector <4 x i8> [[TMP2]], <4 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; GFX8PLUS-NEXT:    [[VEC13:%.*]] = shufflevector <4 x i8> [[TMP1]], <4 x i8> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
+; GFX8PLUS-NEXT:    store <16 x i8> [[VEC13]], ptr addrspace(3) [[INPTR1]], align 2
+; GFX8PLUS-NEXT:    [[CMP:%.*]] = icmp eq i32 [[FLAG]], 0
+; GFX8PLUS-NEXT:    br i1 [[CMP]], label %[[EXIT:.*]], label %[[DO_BODY]]
+; GFX8PLUS:       [[EXIT]]:
+; GFX8PLUS-NEXT:    store <16 x i8> [[VEC13]], ptr [[OUT]], align 16
+; GFX8PLUS-NEXT:    store <16 x i8> [[VEC03]], ptr [[OUT1]], align 16
+; GFX8PLUS-NEXT:    ret void
+;
+entry:
+  %gep0 = getelementptr i8, ptr addrspace(3) %inptr0, i32 0
+  %ele0 = load i8, ptr addrspace(3) %gep0, align 8
+  %gep1 = getelementptr i8, ptr addrspace(3) %inptr0, i32 1
+  %ele1 = load i8, ptr addrspace(3) %gep1, align 1
+  %gep2 = getelementptr i8, ptr addrspace(3) %inptr0, i32 2
+  %ele2 = load i8, ptr addrspace(3) %gep2, align 2
+  %gep3 = getelementptr i8, ptr addrspace(3) %inptr0, i32 3
+  %ele3 = load i8, ptr addrspace(3) %gep3, align 1
+  br label %do.body
+
+do.body:
+  %phi0 = phi i8 [ %ele3, %entry ], [ %otherele3, %do.body ]
+  %phi1 = phi i8 [ %ele2, %entry ], [ %otherele2, %do.body ]
+  %phi2 = phi i8 [ %ele1, %entry ], [ %otherele1, %do.body ]
+  %phi3 = phi i8 [ %ele0, %entry ], [ %otherele0, %do.body ]
+  %otherele0 = load i8, ptr addrspace(3) %gep0, align 8
+  %otherele1 = load i8, ptr addrspace(3) %gep1, align 1
+  %otherele2 = load i8, ptr addrspace(3) %gep2, align 2
+  %otherele3 = load i8, ptr addrspace(3) %gep3, align 1
+  %vec00 = insertelement <16 x i8> poison, i8 %otherele0, i64 8
+  %vec01 = insertelement <16 x i8> %vec00, i8 %otherele1, i64 9
+  %vec02 = insertelement <16 x i8> %vec01, i8 %otherele2, i64 10
+  %vec03 = insertelement <16 x i8> %vec02, i8 %otherele3, i64 11
+  %vec10 = insertelement <16 x i8> poison, i8 %phi3, i64 8
+  %vec11 = insertelement <16 x i8> %vec10, i8 %phi2, i64 9
+  %vec12 = insertelement <16 x i8> %vec11, i8 %phi1, i64 10
+  %vec13 = insertelement <16 x i8> %vec12, i8 %phi0, i64 11
+  store <16 x i8> %vec13, ptr addrspace(3) %inptr1, align 2
+  %cmp = icmp eq i32 %flag, 0
+  br i1 %cmp, label %exit, label %do.body
+
+exit:
+  store <16 x i8> %vec13, ptr %out
+  store <16 x i8> %vec03, ptr %out1
+  ret void
+}
+
+
+
+
----------------
shiltian wrote:

Remove those many empty lines and just leave one at the end.

https://github.com/llvm/llvm-project/pull/134934