[llvm] 634f9a9 - ARMAsmBackend: Use fixupNeedsRelaxationAdvanced. NFC

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 13 15:55:16 PDT 2025


Author: Fangrui Song
Date: 2025-04-13T15:55:11-07:00
New Revision: 634f9a981571eae000c1adc311014c5c64486187

URL: https://github.com/llvm/llvm-project/commit/634f9a981571eae000c1adc311014c5c64486187
DIFF: https://github.com/llvm/llvm-project/commit/634f9a981571eae000c1adc311014c5c64486187.diff

LOG: ARMAsmBackend: Use fixupNeedsRelaxationAdvanced. NFC

This prepares for the upcoming change to simplify relocation recording
in MCAssembler.

While both MCAssembler::fixupNeedsRelaxation and
MCAssembler::handleFixup call evaluateFixup and use
shouldForceRelocation, the shouldForceRelocation logic is not supposed
to be needed by MCAssembler::fixupNeedsRelaxation.

The ARM special cases for interworking branches
(https://reviews.llvm.org/D33436 and https://reviews.llvm.org/D33898)
break the assumption. Switch to fixupNeedsRelaxationAdvanced and
explicitly test the conditions.

Added: 
    

Modified: 
    llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
    llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index bed15bdc274ba..6e6e5cbfb377b 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -335,8 +335,34 @@ const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup,
   return nullptr;
 }
 
-bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
-                                         uint64_t Value) const {
+static bool needsInterworking(const MCAssembler &Asm, const MCSymbol *Sym,
+                              unsigned FixupKind) {
+  // Create relocations for unconditional branches to function symbols with
+  // 
diff erent execution mode in ELF binaries.
+  if (!Sym || !Sym->isELF())
+    return false;
+  unsigned Type = cast<MCSymbolELF>(Sym)->getType();
+  if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC)) {
+    if (Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_uncondbranch))
+      return true;
+    if (!Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_thumb_br ||
+                                  FixupKind == ARM::fixup_arm_thumb_bl ||
+                                  FixupKind == ARM::fixup_t2_condbranch ||
+                                  FixupKind == ARM::fixup_t2_uncondbranch))
+      return true;
+  }
+  return false;
+}
+
+bool ARMAsmBackend::fixupNeedsRelaxationAdvanced(
+    const MCAssembler &Asm, const MCRelaxableFragment &, const MCFixup &Fixup,
+    const MCValue &Target, uint64_t Value, bool Resolved, bool) const {
+  const MCSymbol *Sym = Target.getAddSym();
+  if (needsInterworking(Asm, Sym, Fixup.getTargetKind()))
+    return true;
+
+  if (!Resolved)
+    return true;
   return reasonForFixupRelaxation(Fixup, Value);
 }
 
@@ -973,18 +999,8 @@ bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
   }
   // Create relocations for unconditional branches to function symbols with
   // 
diff erent execution mode in ELF binaries.
-  if (Sym && Sym->isELF()) {
-    unsigned Type = cast<MCSymbolELF>(Sym)->getType();
-    if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC)) {
-      if (Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_uncondbranch))
-        return true;
-      if (!Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_thumb_br ||
-                                    FixupKind == ARM::fixup_arm_thumb_bl ||
-                                    FixupKind == ARM::fixup_t2_condbranch ||
-                                    FixupKind == ARM::fixup_t2_uncondbranch))
-        return true;
-    }
-  }
+  if (needsInterworking(Asm, Sym, Fixup.getTargetKind()))
+    return true;
   // We must always generate a relocation for BL/BLX instructions if we have
   // a symbol to reference, as the linker relies on knowing the destination
   // symbol's thumb-ness to get interworking right.

diff  --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
index 4e4df16d890c9..bd5331356b267 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
@@ -54,8 +54,10 @@ class ARMAsmBackend : public MCAsmBackend {
   const char *reasonForFixupRelaxation(const MCFixup &Fixup,
                                        uint64_t Value) const;
 
-  bool fixupNeedsRelaxation(const MCFixup &Fixup,
-                            uint64_t Value) const override;
+  bool fixupNeedsRelaxationAdvanced(const MCAssembler &,
+                                    const MCRelaxableFragment &,
+                                    const MCFixup &, const MCValue &, uint64_t,
+                                    bool, bool) const override;
 
   void relaxInstruction(MCInst &Inst,
                         const MCSubtargetInfo &STI) const override;


        


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