[llvm] [AMDGPU][True16][CodeGen] update wwm reg sorting check condition (PR #135053)

[Matt Arsenault via llvm-commits]

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@@ -1650,7 +1650,7 @@ void SIFrameLowering::determineCalleeSaves(MachineFunction &MF,
     // are of 32-bit size. SIPreAllocateWWMRegs pass can add tuples into WWM
     // reserved registers.
     const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
-    if (TRI->getRegSizeInBits(*RC) > 32)
+    if (TRI->getRegSizeInBits(*RC) != 32)
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arsenm wrote:

I don't know why this code needs to filter anything.

I don't understand this comment:
> //  SIPreAllocateWWMRegs pass can add tuples into WWM reserved registers.

It can, but why? This should only track the 32-bit element registers 



https://github.com/llvm/llvm-project/pull/135053