[llvm] [AMDGPU] Implement IR expansion for frem instruction (PR #130988)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 13 00:31:38 PDT 2025


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@@ -297,13 +297,4 @@ define amdgpu_kernel void @fdiv_constant_sel_constants(ptr addrspace(1) %p, i1 %
   %bo = fdiv float 8.0, %sel
   store float %bo, ptr addrspace(1) %p, align 4
   ret void
-}
-
-; GCN-LABEL: {{^}}frem_constant_sel_constants:
-; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 2.0, 1.0,
-define amdgpu_kernel void @frem_constant_sel_constants(ptr addrspace(1) %p, i1 %cond) {
-  %sel = select i1 %cond, float -4.0, float 3.0
-  %bo = frem float 5.0, %sel
-  store float %bo, ptr addrspace(1) %p, align 4
-  ret void
-}
+}
----------------
arsenm wrote:

```suggestion
}

```
Whitespace error 

https://github.com/llvm/llvm-project/pull/130988


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