[llvm] [GISel] funnel shift combiner port from SelectionDAG ISel to GlobalISel (PR #135132)
Axel Sorenson via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 12 20:45:53 PDT 2025
================
@@ -674,14 +674,12 @@ define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) {
; CHECK-GI-LABEL: or_shl_fshl_simplify:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: mov w8, #31 // =0x1f
-; CHECK-GI-NEXT: and w9, w2, #0x1f
-; CHECK-GI-NEXT: lsr w10, w0, #1
-; CHECK-GI-NEXT: lsl w11, w1, w2
+; CHECK-GI-NEXT: lsr w9, w0, #1
+; CHECK-GI-NEXT: and w10, w2, #0x1f
; CHECK-GI-NEXT: bic w8, w8, w2
-; CHECK-GI-NEXT: lsl w9, w1, w9
-; CHECK-GI-NEXT: lsr w8, w10, w8
-; CHECK-GI-NEXT: orr w9, w9, w11
-; CHECK-GI-NEXT: orr w0, w9, w8
+; CHECK-GI-NEXT: lsl w10, w1, w10
+; CHECK-GI-NEXT: lsr w8, w9, w8
+; CHECK-GI-NEXT: orr w0, w10, w8
; CHECK-GI-NEXT: ret
%shy = shl i32 %y, %s
%fun = call i32 @llvm.fshl.i32(i32 %y, i32 %x, i32 %s)
----------------
axelcool1234 wrote:
So I've determined why it isn't triggering. If I change `(G_OR $root, $out1, $out2)),` to `(G_OR $root, $out2, $out1)),`, it matches the `or_lshr_fshr_simplify` test case:
```
%shy = lshr i32 %y, %s
%fun = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %s)
%or = or i32 %shy, %fun
ret i32 %or
```
I can also change `%or = or i32 %shy, %fun` to `%or = or i32 %fun, %shy` and make it trigger too. I'm new to the LLVM project but I had the assumption that `G_OR` in tablegen didn't care for the ordering of operands, but it seems like that isn't the case here. Perhaps I'm missing something? @davemgreen @mshockwave
https://github.com/llvm/llvm-project/pull/135132
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