[llvm] c9ad5be - [SLP][NFC]Add a test with the incorrect type promotion after bitwidth analysis, NFC

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2025-04-11T11:10:01-07:00
New Revision: c9ad5bed7fa9ff0b16da1212875ba5341d288f3c

URL: https://github.com/llvm/llvm-project/commit/c9ad5bed7fa9ff0b16da1212875ba5341d288f3c
DIFF: https://github.com/llvm/llvm-project/commit/c9ad5bed7fa9ff0b16da1212875ba5341d288f3c.diff

LOG: [SLP][NFC]Add a test with the incorrect type promotion after bitwidth analysis, NFC

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll b/llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll
new file mode 100644
index 0000000000000..29aed14dc3ffc
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll
@@ -0,0 +1,43 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define <4 x float> @test(i64 %0) {
+; CHECK-LABEL: define <4 x float> @test(
+; CHECK-SAME: i64 [[TMP0:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <4 x i32> <i32 0, i32 0, i32 poison, i32 0>, i32 [[TMP1]], i32 2
+; CHECK-NEXT:    [[TMP3:%.*]] = sext <4 x i32> [[TMP2]] to <4 x i64>
+; CHECK-NEXT:    [[TMP4:%.*]] = sitofp <4 x i64> [[TMP3]] to <4 x float>
+; CHECK-NEXT:    [[TMP5:%.*]] = sitofp <4 x i32> [[TMP2]] to <4 x float>
+; CHECK-NEXT:    [[TMP6:%.*]] = fadd <4 x float> [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = fcmp ogt <4 x float> [[TMP6]], zeroinitializer
+; CHECK-NEXT:    ret <4 x float> [[TMP6]]
+;
+entry:
+  %1 = trunc i64 0 to i32
+  %2 = sitofp i32 %1 to float
+  %3 = sitofp i64 0 to float
+  %4 = fadd float %3, %2
+  %to_max.i = fcmp ogt float %4, 0.000000e+00
+  %5 = trunc i64 0 to i32
+  %6 = sitofp i32 %5 to float
+  %7 = sitofp i64 0 to float
+  %8 = fadd float %7, %6
+  %to_max.i.1 = fcmp ogt float %8, 0.000000e+00
+  %9 = trunc i64 %0 to i32
+  %10 = sitofp i32 %9 to float
+  %11 = sitofp i64 %0 to float
+  %12 = fadd float %11, %10
+  %to_max.i.2 = fcmp ogt float %12, 0.000000e+00
+  %13 = trunc i64 0 to i32
+  %14 = sitofp i32 %13 to float
+  %15 = sitofp i64 0 to float
+  %16 = fadd float %15, %14
+  %to_max.i.3 = fcmp ogt float %16, 0.000000e+00
+  %r0 = insertelement <4 x float> poison, float %4, i32 0
+  %r1 = insertelement <4 x float> %r0, float %8, i32 1
+  %r2 = insertelement <4 x float> %r1, float %12, i32 2
+  %r3 = insertelement <4 x float> %r2, float %16, i32 3
+  ret <4 x float> %r3
+}