[llvm] [AArch64] Generalize integer FPR lane stores for all types (PR #134117)

[Benjamin Maxwell via llvm-commits]

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@@ -146,12 +146,13 @@ define void @insert_vec_v6i64_uaddlv_from_v4i32(ptr %0) {
 ; CHECK-LABEL: insert_vec_v6i64_uaddlv_from_v4i32:
 ; CHECK:       ; %bb.0: ; %entry
 ; CHECK-NEXT:    movi.2d v0, #0000000000000000
-; CHECK-NEXT:    str xzr, [x0, #16]
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MacDue wrote:

I don't think that will prevent this, this first changed to `str xzr` with my previous patch #129756, so it think it's more something not recognizing the sub register extract. 

https://github.com/llvm/llvm-project/pull/134117