[llvm] [AMDGPU] Simplify GCNRewritePartialRegUses pass. (PR #135199)

[Jay Foad via llvm-commits]

================
@@ -422,33 +396,11 @@ bool GCNRewritePartialRegUsesImpl::rewriteReg(Register Reg) const {
   LLVM_DEBUG(dbgs() << "Try to rewrite partial reg " << printReg(Reg, TRI)
                     << ':' << TRI->getRegClassName(RC) << '\n');
 
-  // Collect used subregs and their reg classes infered from instruction
-  // operands.
+  // Collect used subregs.
   SubRegMap SubRegs;
-  for (MachineOperand &MO : Range) {
-    const unsigned SubReg = MO.getSubReg();
-    assert(SubReg != AMDGPU::NoSubRegister); // Due to [1].
-    LLVM_DEBUG(dbgs() << "  " << TRI->getSubRegIndexName(SubReg) << ':');
-
-    const auto [I, Inserted] = SubRegs.try_emplace(SubReg);
-    const TargetRegisterClass *&SubRegRC = I->second.RC;
-
-    if (Inserted)
-      SubRegRC = TRI->getSubRegisterClass(RC, SubReg);
-
-    if (SubRegRC) {
-      if (const TargetRegisterClass *OpDescRC = getOperandRegClass(MO)) {
-        LLVM_DEBUG(dbgs() << TRI->getRegClassName(SubRegRC) << " & "
-                          << TRI->getRegClassName(OpDescRC) << " = ");
-        SubRegRC = TRI->getCommonSubClass(SubRegRC, OpDescRC);
-      }
-    }
-
-    if (!SubRegRC) {
-      LLVM_DEBUG(dbgs() << "couldn't find target regclass\n");
-      return false;
-    }
-    LLVM_DEBUG(dbgs() << TRI->getRegClassName(SubRegRC) << '\n');
+  for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
+    assert(MO.getSubReg() != AMDGPU::NoSubRegister); // Due to [1].
----------------
jayfoad wrote:

Nit: it's probably faster overall to _not_ have a separate loop through the use list looking for NoSubRegister.
```suggestion
    if (MO.getSubReg() == AMDGPU::NoSubRegister)
      return false;
```

https://github.com/llvm/llvm-project/pull/135199