[clang] [llvm] [RISCV] Add Andes XAndesperf (Andes Performance) extension. (PR #135110)

[Jim Lin via llvm-commits]

================
@@ -535,21 +540,29 @@ RISCVMCCodeEmitter::getImmOpValueSlist(const MCInst &MI, unsigned OpNo,
   }
 }
 
-uint64_t
-RISCVMCCodeEmitter::getImmOpValueAsr1(const MCInst &MI, unsigned OpNo,
+template <unsigned N>
+unsigned
+RISCVMCCodeEmitter::getImmOpValueAsrN(const MCInst &MI, unsigned OpNo,
                                       SmallVectorImpl<MCFixup> &Fixups,
                                       const MCSubtargetInfo &STI) const {
   const MCOperand &MO = MI.getOperand(OpNo);
 
   if (MO.isImm()) {
-    uint64_t Res = MO.getImm();
-    assert((Res & 1) == 0 && "LSB is non-zero");
-    return Res >> 1;
+    unsigned Res = MO.getImm();
----------------
tclin914 wrote:

It is my typo. Thanks.

https://github.com/llvm/llvm-project/pull/135110