[llvm] [AMDGPU] Switch V_CNDMASK operands to shrink it into VOP2 (PR #135162)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 10 05:22:34 PDT 2025
================
@@ -831,6 +836,109 @@ bool SIShrinkInstructions::tryReplaceDeadSDST(MachineInstr &MI) const {
return true;
}
+unsigned SIShrinkInstructions::getInverseCompareOpcode(MachineInstr &MI) const {
+ switch (MI.getOpcode()) {
+ // unsigned 32
+ case AMDGPU::V_CMP_EQ_U32_e64:
+ return AMDGPU::V_CMP_NE_U32_e64;
+ case AMDGPU::V_CMP_NE_U32_e64:
+ return AMDGPU::V_CMP_EQ_U32_e64;
+ case AMDGPU::V_CMP_GE_U32_e64:
+ return AMDGPU::V_CMP_LT_U32_e64;
+ case AMDGPU::V_CMP_LE_U32_e64:
+ return AMDGPU::V_CMP_GT_U32_e64;
+ case AMDGPU::V_CMP_GT_U32_e64:
+ return AMDGPU::V_CMP_LE_U32_e64;
+ case AMDGPU::V_CMP_LT_U32_e64:
+ return AMDGPU::V_CMP_GE_U32_e64;
+ // float 32
+ case AMDGPU::V_CMP_EQ_F32_e64:
+ return AMDGPU::V_CMP_NEQ_F32_e64;
+ case AMDGPU::V_CMP_NEQ_F32_e64:
+ return AMDGPU::V_CMP_EQ_F32_e64;
+ case AMDGPU::V_CMP_GE_F32_e64:
+ return AMDGPU::V_CMP_LT_F32_e64;
+ case AMDGPU::V_CMP_LE_F32_e64:
+ return AMDGPU::V_CMP_GT_F32_e64;
+ case AMDGPU::V_CMP_GT_F32_e64:
+ return AMDGPU::V_CMP_LE_F32_e64;
+ case AMDGPU::V_CMP_LT_F32_e64:
+ return AMDGPU::V_CMP_GE_F32_e64;
+ default:
+ return 0;
+ }
+}
+
+bool SIShrinkInstructions::shouldSwitchOperands(MachineRegisterInfo &MRI,
+ MachineInstr &MI,
+ const SIInstrInfo &TII) const {
+ auto allUses = MRI.use_nodbg_operands(MI.getOperand(5).getReg());
+ unsigned Count = 0;
+
+ for (auto &Use : allUses) {
+ if (Use.getParent()->getOpcode() != AMDGPU::V_CNDMASK_B32_e64)
+ return false;
+ MachineOperand *Src0 =
+ TII.getNamedOperand(*Use.getParent(), AMDGPU::OpName::src0);
+ MachineOperand *Src1 =
+ TII.getNamedOperand(*Use.getParent(), AMDGPU::OpName::src1);
+
+ auto Src0Imm = Src0->isImm();
+ auto Src1Imm = Src1->isImm();
+
+ if (!Src1Imm && Src0Imm)
+ return false;
+ if (Src1Imm && !Src0Imm)
+ Count++;
+ }
+ return (Count >= 1);
+}
+
+// OldVCC and NewVCC are used to remember VCC after inverting comparison
+bool SIShrinkInstructions::trySwitchOperands(MachineInstr &MI, Register *OldVCC,
+ Register *NewVCC) const {
+ const DebugLoc &DL = MI.getDebugLoc();
+ auto Reg = MI.getOperand(5).getReg();
+ if (!Reg.isVirtual())
+ return false;
+
+ if (*OldVCC != Reg) {
+ MachineInstr *DefMI = MRI->getVRegDef(Reg);
+ if (DefMI) {
+ unsigned Opcode = getInverseCompareOpcode(*DefMI);
+ if (Opcode &&
+ SIShrinkInstructions::shouldSwitchOperands(*MRI, MI, *TII)) {
+ auto cmpDL = DefMI->getDebugLoc();
----------------
jayfoad wrote:
`CmpDL`
https://github.com/llvm/llvm-project/pull/135162
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