[llvm] [DAGTypeLegalize] Legalize ISD::POISON as ISD::UNDEF for Float Type Legalization (PR #135056)
zhijian lin via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 9 12:50:19 PDT 2025
https://github.com/diggerlin updated https://github.com/llvm/llvm-project/pull/135056
>From e4b240ea12ecc7cb250ece11f9a39ab2d05b0b92 Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Wed, 9 Apr 2025 17:31:36 +0000
Subject: [PATCH 1/4] fix a assert on the PR 125883
---
.../SelectionDAG/LegalizeFloatTypes.cpp | 1 +
llvm/test/CodeGen/RISCV/pr125883.ll | 19 +++++++++++++++++++
2 files changed, 20 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/pr125883.ll
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index 5ed83060e150e..6493e0e6583f0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -165,6 +165,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
case ISD::STRICT_UINT_TO_FP:
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
+ case ISD::POISON:
case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
case ISD::VECREDUCE_FADD:
diff --git a/llvm/test/CodeGen/RISCV/pr125883.ll b/llvm/test/CodeGen/RISCV/pr125883.ll
new file mode 100644
index 0000000000000..f2da05c660be6
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/pr125883.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s -mtriple=riscv32 | FileCheck %s
+
+define void @b(ptr %p1) {
+; CHECK: .cfi_startproc
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: sb zero, 7(a0)
+; CHECK-NEXT: sb zero, 6(a0)
+; CHECK-NEXT: sb zero, 5(a0)
+; CHECK-NEXT: sb a0, 4(a0)
+; CHECK-NEXT: sb zero, 3(a0)
+; CHECK-NEXT: sb zero, 2(a0)
+; CHECK-NEXT: sb zero, 1(a0)
+; CHECK-NEXT: sb a0, 0(a0)
+; CHECK-NEXT: ret
+
+entry:
+ store volatile double poison, ptr %p1, align 1
+ ret void
+}
>From a7456d0a271085d1c18efaaacdca5a130c76538f Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Wed, 9 Apr 2025 17:33:46 +0000
Subject: [PATCH 2/4] change test case name
---
llvm/test/CodeGen/RISCV/{pr125883.ll => pr135056.ll} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename llvm/test/CodeGen/RISCV/{pr125883.ll => pr135056.ll} (100%)
diff --git a/llvm/test/CodeGen/RISCV/pr125883.ll b/llvm/test/CodeGen/RISCV/pr135056.ll
similarity index 100%
rename from llvm/test/CodeGen/RISCV/pr125883.ll
rename to llvm/test/CodeGen/RISCV/pr135056.ll
>From e4607fd2c58cc47bf06b5e530c820988676b5734 Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Wed, 9 Apr 2025 19:03:17 +0000
Subject: [PATCH 3/4] address comment
---
.../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 2 ++
llvm/test/CodeGen/RISCV/pr135056.ll | 16 ++++++----------
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index 6493e0e6583f0..432209e8ecb0a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -1502,6 +1502,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
report_fatal_error("Do not know how to expand the result of this "
"operator!");
// clang-format off
+ case ISD::POISON:
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break;
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
@@ -3320,6 +3321,7 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
case ISD::STRICT_UINT_TO_FP:
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP: R = SoftPromoteHalfRes_XINT_TO_FP(N); break;
+ case ISD::POISON:
case ISD::UNDEF: R = SoftPromoteHalfRes_UNDEF(N); break;
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
case ISD::VECREDUCE_FADD:
diff --git a/llvm/test/CodeGen/RISCV/pr135056.ll b/llvm/test/CodeGen/RISCV/pr135056.ll
index f2da05c660be6..d8ec3e3c94685 100644
--- a/llvm/test/CodeGen/RISCV/pr135056.ll
+++ b/llvm/test/CodeGen/RISCV/pr135056.ll
@@ -1,19 +1,15 @@
; RUN: llc < %s -mtriple=riscv32 | FileCheck %s
-define void @b(ptr %p1) {
+define void @b(ptr %p1, ptr %p2) {
; CHECK: .cfi_startproc
; CHECK-NEXT: # %bb.0: # %entry
-; CHECK-NEXT: sb zero, 7(a0)
-; CHECK-NEXT: sb zero, 6(a0)
-; CHECK-NEXT: sb zero, 5(a0)
-; CHECK-NEXT: sb a0, 4(a0)
-; CHECK-NEXT: sb zero, 3(a0)
-; CHECK-NEXT: sb zero, 2(a0)
-; CHECK-NEXT: sb zero, 1(a0)
-; CHECK-NEXT: sb a0, 0(a0)
+; CHECK-NEXT: sw a0, 4(a0)
+; CHECK-NEXT: sw a0, 0(a0)
+; CHECK-NEXT: sh a0, 0(a1)
; CHECK-NEXT: ret
entry:
- store volatile double poison, ptr %p1, align 1
+ store volatile double poison, ptr %p1
+ store volatile half poison, ptr %p2
ret void
}
>From 0fa1fe5e0536c2d37696c9e6b5caedb9ed5d0fb1 Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Wed, 9 Apr 2025 19:50:29 +0000
Subject: [PATCH 4/4] change the test case name
---
llvm/test/CodeGen/RISCV/{pr135056.ll => poison-legalization.ll} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename llvm/test/CodeGen/RISCV/{pr135056.ll => poison-legalization.ll} (100%)
diff --git a/llvm/test/CodeGen/RISCV/pr135056.ll b/llvm/test/CodeGen/RISCV/poison-legalization.ll
similarity index 100%
rename from llvm/test/CodeGen/RISCV/pr135056.ll
rename to llvm/test/CodeGen/RISCV/poison-legalization.ll
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