[llvm] [AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (PR #134153)

[via llvm-commits]

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@@ -0,0 +1,35 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s
+
+---
+name: test_should_convert_to_v_readfirstlane_b32
+body:               |
+  bb.0:
+    liveins: $vgpr0, $sgpr7, $sgpr8
+    ; GCN-LABEL: name: test_should_convert_to_v_readfirstlane_b32
+    ; GCN: liveins: $vgpr0, $sgpr7, $sgpr8
+    ; GCN-NEXT: {{  $}}
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr7
+    ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
+    ; GCN-NEXT: [[V_CVT_U32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F32_e64 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[V_CVT_U32_F32_e64_]], implicit $exec
+    ; GCN-NEXT: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[V_READFIRSTLANE_B32_]], 16, implicit-def dead $scc
+    ; GCN-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 killed [[S_LSHL_B32_]], killed [[COPY]], implicit-def dead $scc
+    ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[S_OR_B32_]], [[COPY1]], implicit-def dead $scc
+    ; GCN-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 killed [[S_AND_B32_]], 2, implicit-def dead $scc
+    ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+    ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_LSHR_B32_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3
+    ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GCN-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY2]], [[REG_SEQUENCE]], [[S_MOV_B32_]], 0, 0, 0, implicit $exec
+    %0:sreg_32 = COPY $sgpr7
+    %1:sreg_32 = COPY $sgpr8
+    %2:vgpr_32 = nofpexcept V_CVT_U32_F32_e64 0, %1, 0, 0, implicit $mode, implicit $exec
+    %3:sreg_32 = COPY %2
+    %4:sreg_32 = S_LSHL_B32 %3, 16, implicit-def dead $scc
+    %5:sreg_32 = S_OR_B32 killed %4, killed %0, implicit-def dead $scc
+    %6:sreg_32 = S_AND_B32 killed %5, %1, implicit-def dead $scc
+    %7:sreg_32 = S_LSHR_B32 killed %6, 2, implicit-def dead $scc
+    %8:sreg_32 = S_MOV_B32 0
+    %9:sgpr_128 = REG_SEQUENCE %7, %subreg.sub0, %8, %subreg.sub1, %8, %subreg.sub2, %8, %subreg.sub3
+    %10:vgpr_32 = COPY $vgpr0
+    %11:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN %10:vgpr_32, %9:sgpr_128, %8:sreg_32, 0, 0, 0, implicit $exec
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alex-t wrote:

Done

https://github.com/llvm/llvm-project/pull/134153