[llvm] [mlir] [mlir][x86vector] Simplify intrinsic generation (PR #133692)

[Adam Siemieniuk via llvm-commits]

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@@ -182,79 +100,34 @@ struct DotOpConversion : public ConvertOpToLLVMPattern<DotOp> {
   LogicalResult
   matchAndRewrite(DotOp op, OpAdaptor adaptor,
                   ConversionPatternRewriter &rewriter) const override {
-    auto opType = adaptor.getA().getType();
-    Type llvmIntType = IntegerType::get(&getTypeConverter()->getContext(), 8);
+    Type llvmIntType = rewriter.getIntegerType(8);
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adam-smnk wrote:

Simplified whole creation.

https://github.com/llvm/llvm-project/pull/133692