[llvm] [BOLT] Gadget scanner: analyze functions without CFG information (PR #133461)

Anatoly Trosinenko via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 9 07:51:42 PDT 2025


================
@@ -265,21 +286,24 @@ void PacStatePrinter::print(raw_ostream &OS, const State &S) const {
   OS << ">";
 }
 
-class PacRetAnalysis
-    : public DataflowAnalysis<PacRetAnalysis, State, /*Backward=*/false,
-                              PacStatePrinter> {
-  using Parent =
-      DataflowAnalysis<PacRetAnalysis, State, false, PacStatePrinter>;
-  friend Parent;
-
+class PacRetAnalysis {
----------------
atrosinenko wrote:

After trying to come up with meaningful names when implementing the detection of authentication oracles, renamed everything once again...

The detection of authentication oracles requires introducing a similar set of analysis-related classes to compute the state in reverse order: yet another "state", "state printer" and analysis hierarchy. It seems that the most meaningful difference between register properties analyzed by forward and backward analyses is that the forward analysis is used to make sure that instruction's source operands are safe and the backward one is used to make sure that instruction's `Def`s are safe (i.e. do not leak unchecked).

For that reason I renamed `State` to `SrcState`, `RegisterSafetyAnalysis` to `SrcSafetyAnalysis` (this made names a bit shorter along the way) and so on. As the textual representation of this patch grew a lot due to NFC changes, I plan inserting a PR before this one to perform some NFC changes beforehand.

https://github.com/llvm/llvm-project/pull/133461


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