[llvm] [AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128. (PR #134068)

Ricardo Jesus via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 9 06:12:10 PDT 2025


rj-jesus wrote:

Thanks very much for this, I think this is happening due to the compiler inadvertently attempting to pair SVE LDR/STR with Neon loads/stores, which `areCandidatesToMergeOrPair` lets through (in the very last return) if the Neon instruction is unscaled.

I'll put up a new PR to bail out in these cases.

https://github.com/llvm/llvm-project/pull/134068


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