[llvm] [AArch64][test] Regenerate arm64-st1.ll using update_llc_test_checks.py (PR #134919)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 8 12:43:21 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Benjamin Maxwell (MacDue)
<details>
<summary>Changes</summary>
This is a fairly large test file which can be annoying to manually update. Using --filter gets pretty close to the original checks.
---
Patch is 54.77 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/134919.diff
1 Files Affected:
- (modified) llvm/test/CodeGen/AArch64/arm64-st1.ll (+412-336)
``````````diff
diff --git a/llvm/test/CodeGen/AArch64/arm64-st1.ll b/llvm/test/CodeGen/AArch64/arm64-st1.ll
index 6f87c66c87345..7389077953413 100644
--- a/llvm/test/CodeGen/AArch64/arm64-st1.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-st1.ll
@@ -1,11 +1,14 @@
-; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter "(st|mov|add|zip)" --version 5
+; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,SD-CHECK
+; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,GI-CHECK
; The instruction latencies of Exynos-M3 trigger the transform we see under the Exynos check.
-; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs -mcpu=exynos-m3 | FileCheck --check-prefix=EXYNOS %s
+; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -verify-machineinstrs -mcpu=exynos-m3 | FileCheck --check-prefixes=CHECK,EXYNOS %s
define void @st1lane_16b(<16 x i8> %A, ptr %D) {
-; CHECK-LABEL: st1lane_16b
-; CHECK: st1.b { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_16b:
+; CHECK: add x8, x0, #1
+; CHECK: st1.b { v0 }[1], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 1
%tmp = extractelement <16 x i8> %A, i32 1
store i8 %tmp, ptr %ptr
@@ -13,8 +16,10 @@ define void @st1lane_16b(<16 x i8> %A, ptr %D) {
}
define void @st1lane0_16b(<16 x i8> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_16b
-; CHECK: st1.b { v0 }[0], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane0_16b:
+; CHECK: add x8, x0, #1
+; CHECK: st1.b { v0 }[0], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 1
%tmp = extractelement <16 x i8> %A, i32 0
store i8 %tmp, ptr %ptr
@@ -22,8 +27,9 @@ define void @st1lane0_16b(<16 x i8> %A, ptr %D) {
}
define void @st1lane0u_16b(<16 x i8> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_16b
-; CHECK: st1.b { v0 }[0], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane0u_16b:
+; CHECK: st1.b { v0 }[0], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 -1
%tmp = extractelement <16 x i8> %A, i32 0
store i8 %tmp, ptr %ptr
@@ -31,9 +37,10 @@ define void @st1lane0u_16b(<16 x i8> %A, ptr %D) {
}
define void @st1lane_ro_16b(<16 x i8> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_16b
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.b { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_16b:
+; CHECK: add x8, x0, x1
+; CHECK: st1.b { v0 }[1], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 %offset
%tmp = extractelement <16 x i8> %A, i32 1
store i8 %tmp, ptr %ptr
@@ -41,9 +48,10 @@ define void @st1lane_ro_16b(<16 x i8> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_16b(<16 x i8> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_16b
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.b { v0 }[0], [x[[XREG]]]
+; CHECK-LABEL: st1lane0_ro_16b:
+; CHECK: add x8, x0, x1
+; CHECK: st1.b { v0 }[0], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 %offset
%tmp = extractelement <16 x i8> %A, i32 0
store i8 %tmp, ptr %ptr
@@ -51,8 +59,9 @@ define void @st1lane0_ro_16b(<16 x i8> %A, ptr %D, i64 %offset) {
}
define void @st1lane_8h(<8 x i16> %A, ptr %D) {
-; CHECK-LABEL: st1lane_8h
-; CHECK: st1.h { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_8h:
+; CHECK: add x8, x0, #2
+; CHECK: st1.h { v0 }[1], [x8]
%ptr = getelementptr i16, ptr %D, i64 1
%tmp = extractelement <8 x i16> %A, i32 1
store i16 %tmp, ptr %ptr
@@ -60,8 +69,8 @@ define void @st1lane_8h(<8 x i16> %A, ptr %D) {
}
define void @st1lane0_8h(<8 x i16> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_8h
-; CHECK: str h0, [x0, #2]
+; CHECK-LABEL: st1lane0_8h:
+; CHECK: str h0, [x0, #2]
%ptr = getelementptr i16, ptr %D, i64 1
%tmp = extractelement <8 x i16> %A, i32 0
store i16 %tmp, ptr %ptr
@@ -69,8 +78,8 @@ define void @st1lane0_8h(<8 x i16> %A, ptr %D) {
}
define void @st1lane0u_8h(<8 x i16> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_8h
-; CHECK: stur h0, [x0, #-2]
+; CHECK-LABEL: st1lane0u_8h:
+; CHECK: stur h0, [x0, #-2]
%ptr = getelementptr i16, ptr %D, i64 -1
%tmp = extractelement <8 x i16> %A, i32 0
store i16 %tmp, ptr %ptr
@@ -78,9 +87,9 @@ define void @st1lane0u_8h(<8 x i16> %A, ptr %D) {
}
define void @st1lane_ro_8h(<8 x i16> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_8h
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.h { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_8h:
+; CHECK: add x8, x0, x1, lsl #1
+; CHECK: st1.h { v0 }[1], [x8]
%ptr = getelementptr i16, ptr %D, i64 %offset
%tmp = extractelement <8 x i16> %A, i32 1
store i16 %tmp, ptr %ptr
@@ -88,8 +97,8 @@ define void @st1lane_ro_8h(<8 x i16> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_8h(<8 x i16> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_8h
-; CHECK: str h0, [x0, x1, lsl #1]
+; CHECK-LABEL: st1lane0_ro_8h:
+; CHECK: str h0, [x0, x1, lsl #1]
%ptr = getelementptr i16, ptr %D, i64 %offset
%tmp = extractelement <8 x i16> %A, i32 0
store i16 %tmp, ptr %ptr
@@ -97,8 +106,9 @@ define void @st1lane0_ro_8h(<8 x i16> %A, ptr %D, i64 %offset) {
}
define void @st1lane_4s(<4 x i32> %A, ptr %D) {
-; CHECK-LABEL: st1lane_4s
-; CHECK: st1.s { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_4s:
+; CHECK: add x8, x0, #4
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr i32, ptr %D, i64 1
%tmp = extractelement <4 x i32> %A, i32 1
store i32 %tmp, ptr %ptr
@@ -106,8 +116,8 @@ define void @st1lane_4s(<4 x i32> %A, ptr %D) {
}
define void @st1lane0_4s(<4 x i32> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_4s
-; CHECK: str s0, [x0, #4]
+; CHECK-LABEL: st1lane0_4s:
+; CHECK: str s0, [x0, #4]
%ptr = getelementptr i32, ptr %D, i64 1
%tmp = extractelement <4 x i32> %A, i32 0
store i32 %tmp, ptr %ptr
@@ -115,8 +125,8 @@ define void @st1lane0_4s(<4 x i32> %A, ptr %D) {
}
define void @st1lane0u_4s(<4 x i32> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_4s
-; CHECK: stur s0, [x0, #-4]
+; CHECK-LABEL: st1lane0u_4s:
+; CHECK: stur s0, [x0, #-4]
%ptr = getelementptr i32, ptr %D, i64 -1
%tmp = extractelement <4 x i32> %A, i32 0
store i32 %tmp, ptr %ptr
@@ -124,9 +134,9 @@ define void @st1lane0u_4s(<4 x i32> %A, ptr %D) {
}
define void @st1lane_ro_4s(<4 x i32> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_4s
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.s { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_4s:
+; CHECK: add x8, x0, x1, lsl #2
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr i32, ptr %D, i64 %offset
%tmp = extractelement <4 x i32> %A, i32 1
store i32 %tmp, ptr %ptr
@@ -134,8 +144,8 @@ define void @st1lane_ro_4s(<4 x i32> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_4s(<4 x i32> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_4s
-; CHECK: str s0, [x0, x1, lsl #2]
+; CHECK-LABEL: st1lane0_ro_4s:
+; CHECK: str s0, [x0, x1, lsl #2]
%ptr = getelementptr i32, ptr %D, i64 %offset
%tmp = extractelement <4 x i32> %A, i32 0
store i32 %tmp, ptr %ptr
@@ -143,8 +153,9 @@ define void @st1lane0_ro_4s(<4 x i32> %A, ptr %D, i64 %offset) {
}
define void @st1lane_4s_float(<4 x float> %A, ptr %D) {
-; CHECK-LABEL: st1lane_4s_float
-; CHECK: st1.s { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_4s_float:
+; CHECK: add x8, x0, #4
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr float, ptr %D, i64 1
%tmp = extractelement <4 x float> %A, i32 1
store float %tmp, ptr %ptr
@@ -152,8 +163,8 @@ define void @st1lane_4s_float(<4 x float> %A, ptr %D) {
}
define void @st1lane0_4s_float(<4 x float> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_4s_float
-; CHECK: str s0, [x0, #4]
+; CHECK-LABEL: st1lane0_4s_float:
+; CHECK: str s0, [x0, #4]
%ptr = getelementptr float, ptr %D, i64 1
%tmp = extractelement <4 x float> %A, i32 0
store float %tmp, ptr %ptr
@@ -161,8 +172,8 @@ define void @st1lane0_4s_float(<4 x float> %A, ptr %D) {
}
define void @st1lane0u_4s_float(<4 x float> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_4s_float
-; CHECK: stur s0, [x0, #-4]
+; CHECK-LABEL: st1lane0u_4s_float:
+; CHECK: stur s0, [x0, #-4]
%ptr = getelementptr float, ptr %D, i64 -1
%tmp = extractelement <4 x float> %A, i32 0
store float %tmp, ptr %ptr
@@ -170,9 +181,9 @@ define void @st1lane0u_4s_float(<4 x float> %A, ptr %D) {
}
define void @st1lane_ro_4s_float(<4 x float> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_4s_float
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.s { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_4s_float:
+; CHECK: add x8, x0, x1, lsl #2
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr float, ptr %D, i64 %offset
%tmp = extractelement <4 x float> %A, i32 1
store float %tmp, ptr %ptr
@@ -180,8 +191,8 @@ define void @st1lane_ro_4s_float(<4 x float> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_4s_float(<4 x float> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_4s_float
-; CHECK: str s0, [x0, x1, lsl #2]
+; CHECK-LABEL: st1lane0_ro_4s_float:
+; CHECK: str s0, [x0, x1, lsl #2]
%ptr = getelementptr float, ptr %D, i64 %offset
%tmp = extractelement <4 x float> %A, i32 0
store float %tmp, ptr %ptr
@@ -189,8 +200,9 @@ define void @st1lane0_ro_4s_float(<4 x float> %A, ptr %D, i64 %offset) {
}
define void @st1lane_2d(<2 x i64> %A, ptr %D) {
-; CHECK-LABEL: st1lane_2d
-; CHECK: st1.d { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_2d:
+; CHECK: add x8, x0, #8
+; CHECK: st1.d { v0 }[1], [x8]
%ptr = getelementptr i64, ptr %D, i64 1
%tmp = extractelement <2 x i64> %A, i32 1
store i64 %tmp, ptr %ptr
@@ -198,8 +210,8 @@ define void @st1lane_2d(<2 x i64> %A, ptr %D) {
}
define void @st1lane0_2d(<2 x i64> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_2d
-; CHECK: str d0, [x0, #8]
+; CHECK-LABEL: st1lane0_2d:
+; CHECK: str d0, [x0, #8]
%ptr = getelementptr i64, ptr %D, i64 1
%tmp = extractelement <2 x i64> %A, i32 0
store i64 %tmp, ptr %ptr
@@ -207,8 +219,8 @@ define void @st1lane0_2d(<2 x i64> %A, ptr %D) {
}
define void @st1lane0u_2d(<2 x i64> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_2d
-; CHECK: stur d0, [x0, #-8]
+; CHECK-LABEL: st1lane0u_2d:
+; CHECK: stur d0, [x0, #-8]
%ptr = getelementptr i64, ptr %D, i64 -1
%tmp = extractelement <2 x i64> %A, i32 0
store i64 %tmp, ptr %ptr
@@ -216,9 +228,9 @@ define void @st1lane0u_2d(<2 x i64> %A, ptr %D) {
}
define void @st1lane_ro_2d(<2 x i64> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_2d
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.d { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_2d:
+; CHECK: add x8, x0, x1, lsl #3
+; CHECK: st1.d { v0 }[1], [x8]
%ptr = getelementptr i64, ptr %D, i64 %offset
%tmp = extractelement <2 x i64> %A, i32 1
store i64 %tmp, ptr %ptr
@@ -226,8 +238,8 @@ define void @st1lane_ro_2d(<2 x i64> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_2d(<2 x i64> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_2d
-; CHECK: str d0, [x0, x1, lsl #3]
+; CHECK-LABEL: st1lane0_ro_2d:
+; CHECK: str d0, [x0, x1, lsl #3]
%ptr = getelementptr i64, ptr %D, i64 %offset
%tmp = extractelement <2 x i64> %A, i32 0
store i64 %tmp, ptr %ptr
@@ -235,8 +247,9 @@ define void @st1lane0_ro_2d(<2 x i64> %A, ptr %D, i64 %offset) {
}
define void @st1lane_2d_double(<2 x double> %A, ptr %D) {
-; CHECK-LABEL: st1lane_2d_double
-; CHECK: st1.d { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_2d_double:
+; CHECK: add x8, x0, #8
+; CHECK: st1.d { v0 }[1], [x8]
%ptr = getelementptr double, ptr %D, i64 1
%tmp = extractelement <2 x double> %A, i32 1
store double %tmp, ptr %ptr
@@ -244,8 +257,8 @@ define void @st1lane_2d_double(<2 x double> %A, ptr %D) {
}
define void @st1lane0_2d_double(<2 x double> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_2d_double
-; CHECK: str d0, [x0, #8]
+; CHECK-LABEL: st1lane0_2d_double:
+; CHECK: str d0, [x0, #8]
%ptr = getelementptr double, ptr %D, i64 1
%tmp = extractelement <2 x double> %A, i32 0
store double %tmp, ptr %ptr
@@ -253,8 +266,8 @@ define void @st1lane0_2d_double(<2 x double> %A, ptr %D) {
}
define void @st1lane0u_2d_double(<2 x double> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_2d_double
-; CHECK: stur d0, [x0, #-8]
+; CHECK-LABEL: st1lane0u_2d_double:
+; CHECK: stur d0, [x0, #-8]
%ptr = getelementptr double, ptr %D, i64 -1
%tmp = extractelement <2 x double> %A, i32 0
store double %tmp, ptr %ptr
@@ -262,9 +275,9 @@ define void @st1lane0u_2d_double(<2 x double> %A, ptr %D) {
}
define void @st1lane_ro_2d_double(<2 x double> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_2d_double
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.d { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_2d_double:
+; CHECK: add x8, x0, x1, lsl #3
+; CHECK: st1.d { v0 }[1], [x8]
%ptr = getelementptr double, ptr %D, i64 %offset
%tmp = extractelement <2 x double> %A, i32 1
store double %tmp, ptr %ptr
@@ -272,8 +285,8 @@ define void @st1lane_ro_2d_double(<2 x double> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_2d_double(<2 x double> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_2d_double
-; CHECK: str d0, [x0, x1, lsl #3]
+; CHECK-LABEL: st1lane0_ro_2d_double:
+; CHECK: str d0, [x0, x1, lsl #3]
%ptr = getelementptr double, ptr %D, i64 %offset
%tmp = extractelement <2 x double> %A, i32 0
store double %tmp, ptr %ptr
@@ -281,8 +294,10 @@ define void @st1lane0_ro_2d_double(<2 x double> %A, ptr %D, i64 %offset) {
}
define void @st1lane_8b(<8 x i8> %A, ptr %D) {
-; CHECK-LABEL: st1lane_8b
-; CHECK: st1.b { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_8b:
+; CHECK: add x8, x0, #1
+; CHECK: st1.b { v0 }[1], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 1
%tmp = extractelement <8 x i8> %A, i32 1
store i8 %tmp, ptr %ptr
@@ -290,9 +305,10 @@ define void @st1lane_8b(<8 x i8> %A, ptr %D) {
}
define void @st1lane_ro_8b(<8 x i8> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_8b
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.b { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_8b:
+; CHECK: add x8, x0, x1
+; CHECK: st1.b { v0 }[1], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 %offset
%tmp = extractelement <8 x i8> %A, i32 1
store i8 %tmp, ptr %ptr
@@ -300,9 +316,10 @@ define void @st1lane_ro_8b(<8 x i8> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_8b(<8 x i8> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_8b
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.b { v0 }[0], [x[[XREG]]]
+; CHECK-LABEL: st1lane0_ro_8b:
+; CHECK: add x8, x0, x1
+; CHECK: st1.b { v0 }[0], [x8]
+
%ptr = getelementptr i8, ptr %D, i64 %offset
%tmp = extractelement <8 x i8> %A, i32 0
store i8 %tmp, ptr %ptr
@@ -310,8 +327,9 @@ define void @st1lane0_ro_8b(<8 x i8> %A, ptr %D, i64 %offset) {
}
define void @st1lane_4h(<4 x i16> %A, ptr %D) {
-; CHECK-LABEL: st1lane_4h
-; CHECK: st1.h { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_4h:
+; CHECK: add x8, x0, #2
+; CHECK: st1.h { v0 }[1], [x8]
%ptr = getelementptr i16, ptr %D, i64 1
%tmp = extractelement <4 x i16> %A, i32 1
store i16 %tmp, ptr %ptr
@@ -319,8 +337,8 @@ define void @st1lane_4h(<4 x i16> %A, ptr %D) {
}
define void @st1lane0_4h(<4 x i16> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_4h
-; CHECK: str h0, [x0, #2]
+; CHECK-LABEL: st1lane0_4h:
+; CHECK: str h0, [x0, #2]
%ptr = getelementptr i16, ptr %D, i64 1
%tmp = extractelement <4 x i16> %A, i32 0
store i16 %tmp, ptr %ptr
@@ -328,8 +346,8 @@ define void @st1lane0_4h(<4 x i16> %A, ptr %D) {
}
define void @st1lane0u_4h(<4 x i16> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_4h
-; CHECK: stur h0, [x0, #-2]
+; CHECK-LABEL: st1lane0u_4h:
+; CHECK: stur h0, [x0, #-2]
%ptr = getelementptr i16, ptr %D, i64 -1
%tmp = extractelement <4 x i16> %A, i32 0
store i16 %tmp, ptr %ptr
@@ -337,9 +355,9 @@ define void @st1lane0u_4h(<4 x i16> %A, ptr %D) {
}
define void @st1lane_ro_4h(<4 x i16> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_4h
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.h { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_4h:
+; CHECK: add x8, x0, x1, lsl #1
+; CHECK: st1.h { v0 }[1], [x8]
%ptr = getelementptr i16, ptr %D, i64 %offset
%tmp = extractelement <4 x i16> %A, i32 1
store i16 %tmp, ptr %ptr
@@ -347,8 +365,8 @@ define void @st1lane_ro_4h(<4 x i16> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_4h(<4 x i16> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_4h
-; CHECK: str h0, [x0, x1, lsl #1]
+; CHECK-LABEL: st1lane0_ro_4h:
+; CHECK: str h0, [x0, x1, lsl #1]
%ptr = getelementptr i16, ptr %D, i64 %offset
%tmp = extractelement <4 x i16> %A, i32 0
store i16 %tmp, ptr %ptr
@@ -356,8 +374,9 @@ define void @st1lane0_ro_4h(<4 x i16> %A, ptr %D, i64 %offset) {
}
define void @st1lane_2s(<2 x i32> %A, ptr %D) {
-; CHECK-LABEL: st1lane_2s
-; CHECK: st1.s { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_2s:
+; CHECK: add x8, x0, #4
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr i32, ptr %D, i64 1
%tmp = extractelement <2 x i32> %A, i32 1
store i32 %tmp, ptr %ptr
@@ -365,8 +384,8 @@ define void @st1lane_2s(<2 x i32> %A, ptr %D) {
}
define void @st1lane0_2s(<2 x i32> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_2s
-; CHECK: str s0, [x0, #4]
+; CHECK-LABEL: st1lane0_2s:
+; CHECK: str s0, [x0, #4]
%ptr = getelementptr i32, ptr %D, i64 1
%tmp = extractelement <2 x i32> %A, i32 0
store i32 %tmp, ptr %ptr
@@ -374,8 +393,8 @@ define void @st1lane0_2s(<2 x i32> %A, ptr %D) {
}
define void @st1lane0u_2s(<2 x i32> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_2s
-; CHECK: stur s0, [x0, #-4]
+; CHECK-LABEL: st1lane0u_2s:
+; CHECK: stur s0, [x0, #-4]
%ptr = getelementptr i32, ptr %D, i64 -1
%tmp = extractelement <2 x i32> %A, i32 0
store i32 %tmp, ptr %ptr
@@ -383,9 +402,9 @@ define void @st1lane0u_2s(<2 x i32> %A, ptr %D) {
}
define void @st1lane_ro_2s(<2 x i32> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane_ro_2s
-; CHECK: add x[[XREG:[0-9]+]], x0, x1
-; CHECK: st1.s { v0 }[1], [x[[XREG]]]
+; CHECK-LABEL: st1lane_ro_2s:
+; CHECK: add x8, x0, x1, lsl #2
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr i32, ptr %D, i64 %offset
%tmp = extractelement <2 x i32> %A, i32 1
store i32 %tmp, ptr %ptr
@@ -393,8 +412,8 @@ define void @st1lane_ro_2s(<2 x i32> %A, ptr %D, i64 %offset) {
}
define void @st1lane0_ro_2s(<2 x i32> %A, ptr %D, i64 %offset) {
-; CHECK-LABEL: st1lane0_ro_2s
-; CHECK: str s0, [x0, x1, lsl #2]
+; CHECK-LABEL: st1lane0_ro_2s:
+; CHECK: str s0, [x0, x1, lsl #2]
%ptr = getelementptr i32, ptr %D, i64 %offset
%tmp = extractelement <2 x i32> %A, i32 0
store i32 %tmp, ptr %ptr
@@ -402,8 +421,9 @@ define void @st1lane0_ro_2s(<2 x i32> %A, ptr %D, i64 %offset) {
}
define void @st1lane_2s_float(<2 x float> %A, ptr %D) {
-; CHECK-LABEL: st1lane_2s_float
-; CHECK: st1.s { v0 }[1], [x{{[0-9]+}}]
+; CHECK-LABEL: st1lane_2s_float:
+; CHECK: add x8, x0, #4
+; CHECK: st1.s { v0 }[1], [x8]
%ptr = getelementptr float, ptr %D, i64 1
%tmp = extractelement <2 x float> %A, i32 1
store float %tmp, ptr %ptr
@@ -411,8 +431,8 @@ define void @st1lane_2s_float(<2 x float> %A, ptr %D) {
}
define void @st1lane0_2s_float(<2 x float> %A, ptr %D) {
-; CHECK-LABEL: st1lane0_2s_float
-; CHECK: str s0, [x0, #4]
+; CHECK-LABEL: st1lane0_2s_float:
+; CHECK: str s0, [x0, #4]
%ptr = getelementptr float, ptr %D, i64 1
%tmp = extractelement <2 x float> %A, i32 0
store float %tmp, ptr %ptr
@@ -420,8 +440,8 @@ define void @st1lane0_2s_float(<2 x float> %A, ptr %D) {
}
define void @st1lane0u_2s_float(<2 x float> %A, ptr %D) {
-; CHECK-LABEL: st1lane0u_2s_float
-; CHECK: stur s0, [x0, #-4]
+; CHECK-LABEL: st1lane0u_2s_float:
+; CHECK: stur s0, [x0, #-4]
%ptr = getelementptr float, ptr %D, i64 -1
%tmp = extractelement <2 x float> %A, i32 0
store float %tmp, ptr %ptr
@@ -429,9 +449,9 @@ define void @st1lane0u_2s_float(<2 x float> %A, ptr %D) {
}
...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/134919
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