[llvm] [X86][GlobalISel] Support addr matching in SDAG patterns (PR #130445)

[Evgenii Kudriashov via llvm-commits]

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@@ -445,6 +450,19 @@ bool X86InstructionSelector::select(MachineInstr &I) {
   return false;
 }
 
+unsigned X86InstructionSelector::getPtrLoadStoreOp(const LLT &Ty,
+                                                   const RegisterBank &RB,
+                                                   unsigned Opc) const {
+  assert((Opc == TargetOpcode::G_STORE || Opc == TargetOpcode::G_LOAD) &&
+         "Only G_STORE and G_LOAD are expected for selection");
+  bool IsLoad = (Opc == TargetOpcode::G_LOAD);
+  if (Ty == LLT::pointer(0, 32) && X86::GPRRegBankID == RB.getID())
+    return IsLoad ? X86::MOV32rm : X86::MOV32mr;
+  if (Ty == LLT::pointer(0, 64) && X86::GPRRegBankID == RB.getID())
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e-kud wrote:

I think we'll start seeing problems at Legalizer because there are a lot of assumptions for `p0` for stores and loads in particular. But I've changed it anyway.

https://github.com/llvm/llvm-project/pull/130445