[llvm] [AMDGPU] SIInstrInfo: Fix resultDependsOnExec for VOPC instructions (PR #134629)

[Frederik Harwath via llvm-commits]

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@@ -151,6 +151,9 @@ static bool resultDependsOnExec(const MachineInstr &MI) {
   // Ignore comparisons which are only used masked with exec.
   // This allows some hoisting/sinking of VALU comparisons.
   if (MI.isCompare()) {
+    if (SIInstrInfo::isVOPC(MI))
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frederik-h wrote:

> > But the implicit write to VCC doesn't "depend on exec", right?
> 
> Well it does, because bits in VCC corresponding to disabled lanes in EXEC will be set to 0. Exactly the same as the explicit scalar def of a VOPC-promoted-to-VOP3 instruction.

I think you are right. I came up with a more convoluted interpretation of what "depending on exec" might mean ;-) , but what you are saying is also in line with the way in which this function would handle the VOP3 encoding of the comparison instructions (i.e. return true if the destination register has a use; except for some special cases). I have updated the function to query the "sdst" operand instead of "operand 0" and I made it return true if the "sdst" operand doesn't exist based on the assumption that an instruction for which `isCompare()` is true either has a single destination which is the "sdst" operand or it has an implicit use of vcc or vcc_low (?). Since the function already returns true if `!DstReg.isVirtual` it seems correct to return true in the latter case, too.

 I'll try to come up with further test cases since the existing tests don't care if this function returns true or false for the relevant comparisons.

https://github.com/llvm/llvm-project/pull/134629