[llvm] [AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128. (PR #134068)

[Ricardo Jesus via llvm-commits]

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@@ -2840,6 +2883,9 @@ bool AArch64LoadStoreOpt::optimizeBlock(MachineBasicBlock &MBB,
     updateDefinedRegisters(*MBBI, DefinedInBB, TRI);
     if (TII->isPairableLdStInst(*MBBI) && tryToPairLdStInst(MBBI))
       Modified = true;
+    else if (CanPairFillSpill && isPairableFillSpillInst(*MBBI) &&
+             tryToPairLdStInst(MBBI))
+      Modified = true;
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rj-jesus wrote:

I think they can, I think I tried this at first but found myself having to check for the opcodes for the fill/spill instructions in more than one place, and so went for the separate paths in the end. But I'll give this a try so that we can see how it looks proper.

https://github.com/llvm/llvm-project/pull/134068