[llvm] [X86][SSE] Don't emit SSE2 load instructions in SSE1-only mode (PR #134547)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 7 03:57:31 PDT 2025
================
@@ -396,9 +397,10 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
case X86::MOVUPDrm:
case X86::MOVUPSrm:
// TODO: SSE3 MOVDDUP Handling
- return FixupConstant({{X86::MOVSSrm, 1, 32, rebuildZeroUpperCst},
- {X86::MOVSDrm, 1, 64, rebuildZeroUpperCst}},
- 128, 1);
+ return FixupConstant(
+ {{X86::MOVSSrm, 1, 32, rebuildZeroUpperCst},
+ {HasSSE2 ? X86::MOVSDrm : 0, 1, 64, rebuildZeroUpperCst}},
+ 128, 1);
----------------
RKSimon wrote:
Convert this to the `FixupEntry Fixups[] = {` pattern used below
https://github.com/llvm/llvm-project/pull/134547
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