[llvm] 387a885 - Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-04-07T10:29:16+01:00
New Revision: 387a8859cfea9e6f8282f14f21064d9ec562e66a

URL: https://github.com/llvm/llvm-project/commit/387a8859cfea9e6f8282f14f21064d9ec562e66a
DIFF: https://github.com/llvm/llvm-project/commit/387a8859cfea9e6f8282f14f21064d9ec562e66a.diff

LOG: Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index ad44ee755698a..2a1dd2b2def17 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -15095,7 +15095,7 @@ static SDValue reverseZExtICmpCombine(SDNode *N, SelectionDAG &DAG,
 
   SDValue Res =
       DAG.getNode(ISD::AND, DL, WideVT, X,
-                  DAG.getConstant(1 << ShAmt.getZExtValue(), DL, WideVT));
+                  DAG.getConstant(1ULL << ShAmt.getZExtValue(), DL, WideVT));
   Res = DAG.getSetCC(DL,
                      EVT::getVectorVT(*DAG.getContext(), MVT::i1,
                                       WideVT.getVectorElementCount()),